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Support an extension of ARM asm syntax to allow immediate operands to ADR instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138635 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson
2011-08-26 18:09:22 +00:00
parent 06a531ff63
commit 96425c8464
7 changed files with 56 additions and 18 deletions
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15
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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@@ -2310,12 +2310,15 @@ static DecodeStatus DecodeThumbAddSpecialReg(llvm::MCInst &Inst, uint16_t Insn,
CHECK(S, DecodetGPRRegisterClass(Inst, dst, Address, Decoder));
if (Inst.getOpcode() == ARM::tADR)
Inst.addOperand(MCOperand::CreateReg(ARM::PC));
else if (Inst.getOpcode() == ARM::tADDrSPi)
Inst.addOperand(MCOperand::CreateReg(ARM::SP));
else
return Fail;
switch(Inst.getOpcode()) {
case ARM::tADR:
break;
case ARM::tADDrSPi:
Inst.addOperand(MCOperand::CreateReg(ARM::SP));
break;
default:
return Fail;
}
Inst.addOperand(MCOperand::CreateImm(imm));
return S;