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LiveRegUnits: Use *MBB for consistency and convenience.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192634 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -80,7 +80,7 @@ public:
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void stepForward(const MachineInstr &MI, const MCRegisterInfo &MCRI);
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/// \brief Adds all registers in the live-in list of block @p BB.
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void addLiveIns(const MachineBasicBlock &BB, const MCRegisterInfo &MCRI);
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void addLiveIns(const MachineBasicBlock *MBB, const MCRegisterInfo &MCRI);
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};
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} // namespace llvm
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@ -1049,13 +1049,13 @@ bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
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// Initialize liveins to the first BB. These are potentiall redefined by
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// predicated instructions.
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Redefs.init(TRI);
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Redefs.addLiveIns(*(CvtBBI->BB), *TRI);
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Redefs.addLiveIns(*(NextBBI->BB), *TRI);
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Redefs.addLiveIns(CvtBBI->BB, *TRI);
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Redefs.addLiveIns(NextBBI->BB, *TRI);
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// Compute a set of registers which must not be killed by instructions in
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// BB1: This is everything live-in to BB2.
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DontKill.init(TRI);
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DontKill.addLiveIns(*(NextBBI->BB), *TRI);
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DontKill.addLiveIns(NextBBI->BB, *TRI);
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if (CvtBBI->BB->pred_size() > 1) {
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BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
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@ -1154,8 +1154,8 @@ bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
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// Initialize liveins to the first BB. These are potentially redefined by
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// predicated instructions.
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Redefs.init(TRI);
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Redefs.addLiveIns(*(CvtBBI->BB), *TRI);
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Redefs.addLiveIns(*(NextBBI->BB), *TRI);
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Redefs.addLiveIns(CvtBBI->BB, *TRI);
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Redefs.addLiveIns(NextBBI->BB, *TRI);
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DontKill.clear();
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@ -1284,7 +1284,7 @@ bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
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// Initialize liveins to the first BB. These are potentially redefined by
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// predicated instructions.
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Redefs.init(TRI);
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Redefs.addLiveIns(*(BBI1->BB), *TRI);
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Redefs.addLiveIns(BBI1->BB, *TRI);
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// Remove the duplicated instructions at the beginnings of both paths.
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MachineBasicBlock::iterator DI1 = BBI1->BB->begin();
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@ -102,10 +102,10 @@ void LiveRegUnits::stepForward(const MachineInstr &MI,
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}
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/// Adds all registers in the live-in list of block @p BB.
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void LiveRegUnits::addLiveIns(const MachineBasicBlock &BB,
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void LiveRegUnits::addLiveIns(const MachineBasicBlock *MBB,
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const MCRegisterInfo &MCRI) {
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for (MachineBasicBlock::livein_iterator L = BB.livein_begin(),
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LE = BB.livein_end(); L != LE; ++L) {
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for (MachineBasicBlock::livein_iterator L = MBB->livein_begin(),
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LE = MBB->livein_end(); L != LE; ++L) {
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addReg(*L, MCRI);
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}
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}
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