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Add registration for PPC-specific passes to allow the IR to be dumped
via -print-after-all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175058 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -28,10 +28,16 @@ using namespace llvm;
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STATISTIC(NumExpanded, "Number of branches expanded to long format");
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namespace llvm {
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void initializePPCBSelPass(PassRegistry&);
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}
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namespace {
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struct PPCBSel : public MachineFunctionPass {
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static char ID;
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PPCBSel() : MachineFunctionPass(ID) {}
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PPCBSel() : MachineFunctionPass(ID) {
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initializePPCBSelPass(*PassRegistry::getPassRegistry());
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}
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/// BlockSizes - The sizes of the basic blocks in the function.
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std::vector<unsigned> BlockSizes;
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@ -45,6 +51,9 @@ namespace {
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char PPCBSel::ID = 0;
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}
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INITIALIZE_PASS(PPCBSel, "ppc-branch-select", "PowerPC Branch Selector",
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false, false)
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/// createPPCBranchSelectionPass - returns an instance of the Branch Selection
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/// Pass
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///
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@ -54,6 +54,10 @@ using namespace llvm;
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STATISTIC(NumCTRLoops, "Number of loops converted to CTR loops");
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namespace llvm {
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void initializePPCCTRLoopsPass(PassRegistry&);
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}
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namespace {
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class CountValue;
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struct PPCCTRLoops : public MachineFunctionPass {
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@ -64,7 +68,9 @@ namespace {
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public:
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static char ID; // Pass identification, replacement for typeid
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PPCCTRLoops() : MachineFunctionPass(ID) {}
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PPCCTRLoops() : MachineFunctionPass(ID) {
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initializePPCCTRLoopsPass(*PassRegistry::getPassRegistry());
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}
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virtual bool runOnMachineFunction(MachineFunction &MF);
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@ -174,6 +180,12 @@ namespace {
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};
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} // end anonymous namespace
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INITIALIZE_PASS_BEGIN(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops",
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false, false)
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INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
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INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
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INITIALIZE_PASS_END(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops",
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false, false)
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/// isCompareEquals - Returns true if the instruction is a compare equals
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/// instruction with an immediate operand.
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@ -34,6 +34,10 @@
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#include "llvm/Target/TargetOptions.h"
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using namespace llvm;
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namespace llvm {
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void initializePPCDAGToDAGISelPass(PassRegistry&);
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}
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namespace {
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//===--------------------------------------------------------------------===//
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/// PPCDAGToDAGISel - PPC specific code to select PPC machine
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@ -48,7 +52,9 @@ namespace {
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explicit PPCDAGToDAGISel(PPCTargetMachine &tm)
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: SelectionDAGISel(tm), TM(tm),
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PPCLowering(*TM.getTargetLowering()),
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PPCSubTarget(*TM.getSubtargetImpl()) {}
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PPCSubTarget(*TM.getSubtargetImpl()) {
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initializePPCDAGToDAGISelPass(*PassRegistry::getPassRegistry());
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}
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virtual bool runOnMachineFunction(MachineFunction &MF) {
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// Make sure we re-emit a set of the global base reg if necessary
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@ -1330,3 +1336,14 @@ FunctionPass *llvm::createPPCISelDag(PPCTargetMachine &TM) {
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return new PPCDAGToDAGISel(TM);
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}
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static void initializePassOnce(PassRegistry &Registry) {
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const char *Name = "PowerPC DAG->DAG Pattern Instruction Selection";
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PassInfo *PI = new PassInfo(Name, "ppc-codegen", &SelectionDAGISel::ID, 0,
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false, false);
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Registry.registerPass(*PI, true);
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}
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void llvm::initializePPCDAGToDAGISelPass(PassRegistry &Registry) {
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CALL_ONCE_INITIALIZATION(initializePassOnce);
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}
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