mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-04-06 09:44:39 +00:00
remove support for a bunch of obsolete instruction encodings
and other backward compatibility hacks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133273 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
738f05aa90
commit
96a74c57d9
@ -223,21 +223,18 @@ namespace bitc {
|
||||
FUNC_CODE_INST_UNREACHABLE = 15, // UNREACHABLE
|
||||
|
||||
FUNC_CODE_INST_PHI = 16, // PHI: [ty, val0,bb0, ...]
|
||||
FUNC_CODE_INST_MALLOC = 17, // MALLOC: [instty, op, align]
|
||||
FUNC_CODE_INST_FREE = 18, // FREE: [opty, op]
|
||||
// 17 is unused.
|
||||
// 18 is unused.
|
||||
FUNC_CODE_INST_ALLOCA = 19, // ALLOCA: [instty, op, align]
|
||||
FUNC_CODE_INST_LOAD = 20, // LOAD: [opty, op, align, vol]
|
||||
// FIXME: Remove STORE in favor of STORE2 in LLVM 3.0
|
||||
FUNC_CODE_INST_STORE = 21, // STORE: [valty,val,ptr, align, vol]
|
||||
// FIXME: Remove CALL in favor of CALL2 in LLVM 3.0
|
||||
FUNC_CODE_INST_CALL = 22, // CALL with potentially invalid metadata
|
||||
// 21 is unused.
|
||||
// 22 is unused.
|
||||
FUNC_CODE_INST_VAARG = 23, // VAARG: [valistty, valist, instty]
|
||||
// This store code encodes the pointer type, rather than the value type
|
||||
// this is so information only available in the pointer type (e.g. address
|
||||
// spaces) is retained.
|
||||
FUNC_CODE_INST_STORE2 = 24, // STORE: [ptrty,ptr,val, align, vol]
|
||||
// FIXME: Remove GETRESULT in favor of EXTRACTVAL in LLVM 3.0
|
||||
FUNC_CODE_INST_GETRESULT = 25, // GETRESULT: [ty, opval, n]
|
||||
// 25 is unused.
|
||||
FUNC_CODE_INST_EXTRACTVAL = 26, // EXTRACTVAL: [n x operands]
|
||||
FUNC_CODE_INST_INSERTVAL = 27, // INSERTVAL: [n x operands]
|
||||
// fcmp/icmp returning Int1TY or vector of Int1Ty. Same as CMP, exists to
|
||||
@ -247,9 +244,7 @@ namespace bitc {
|
||||
FUNC_CODE_INST_VSELECT = 29, // VSELECT: [ty,opval,opval,predty,pred]
|
||||
FUNC_CODE_INST_INBOUNDS_GEP= 30, // INBOUNDS_GEP: [n x operands]
|
||||
FUNC_CODE_INST_INDIRECTBR = 31, // INDIRECTBR: [opty, op0, op1, ...]
|
||||
|
||||
// FIXME: Remove DEBUG_LOC in favor of DEBUG_LOC2 in LLVM 3.0
|
||||
FUNC_CODE_DEBUG_LOC = 32, // DEBUG_LOC with potentially invalid metadata
|
||||
// 32 is unused.
|
||||
FUNC_CODE_DEBUG_LOC_AGAIN = 33, // DEBUG_LOC_AGAIN
|
||||
|
||||
FUNC_CODE_INST_CALL2 = 34, // CALL2: [attr, fnty, fnid, args...]
|
||||
|
||||
@ -2087,18 +2087,6 @@ bool BitcodeReader::ParseFunctionBody(Function *F) {
|
||||
break;
|
||||
}
|
||||
|
||||
case bitc::FUNC_CODE_INST_GETRESULT: { // GETRESULT: [ty, val, n]
|
||||
if (Record.size() != 2)
|
||||
return Error("Invalid GETRESULT record");
|
||||
unsigned OpNum = 0;
|
||||
Value *Op;
|
||||
getValueTypePair(Record, OpNum, NextValueNo, Op);
|
||||
unsigned Index = Record[1];
|
||||
I = ExtractValueInst::Create(Op, Index);
|
||||
InstructionList.push_back(I);
|
||||
break;
|
||||
}
|
||||
|
||||
case bitc::FUNC_CODE_INST_RET: // RET: [opty,opval<optional>]
|
||||
{
|
||||
unsigned Size = Record.size();
|
||||
@ -2109,33 +2097,13 @@ bool BitcodeReader::ParseFunctionBody(Function *F) {
|
||||
}
|
||||
|
||||
unsigned OpNum = 0;
|
||||
SmallVector<Value *,4> Vs;
|
||||
do {
|
||||
Value *Op = NULL;
|
||||
if (getValueTypePair(Record, OpNum, NextValueNo, Op))
|
||||
return Error("Invalid RET record");
|
||||
Vs.push_back(Op);
|
||||
} while(OpNum != Record.size());
|
||||
Value *Op = NULL;
|
||||
if (getValueTypePair(Record, OpNum, NextValueNo, Op))
|
||||
return Error("Invalid RET record");
|
||||
if (OpNum != Record.size())
|
||||
return Error("Invalid RET record");
|
||||
|
||||
const Type *ReturnType = F->getReturnType();
|
||||
// Handle multiple return values. FIXME: Remove in LLVM 3.0.
|
||||
if (Vs.size() > 1 ||
|
||||
(ReturnType->isStructTy() &&
|
||||
(Vs.empty() || Vs[0]->getType() != ReturnType))) {
|
||||
Value *RV = UndefValue::get(ReturnType);
|
||||
for (unsigned i = 0, e = Vs.size(); i != e; ++i) {
|
||||
I = InsertValueInst::Create(RV, Vs[i], i, "mrv");
|
||||
InstructionList.push_back(I);
|
||||
CurBB->getInstList().push_back(I);
|
||||
ValueList.AssignValue(I, NextValueNo++);
|
||||
RV = I;
|
||||
}
|
||||
I = ReturnInst::Create(Context, RV);
|
||||
InstructionList.push_back(I);
|
||||
break;
|
||||
}
|
||||
|
||||
I = ReturnInst::Create(Context, Vs[0]);
|
||||
I = ReturnInst::Create(Context, Op);
|
||||
InstructionList.push_back(I);
|
||||
break;
|
||||
}
|
||||
@ -2282,47 +2250,14 @@ bool BitcodeReader::ParseFunctionBody(Function *F) {
|
||||
break;
|
||||
}
|
||||
|
||||
case bitc::FUNC_CODE_INST_MALLOC: { // MALLOC: [instty, op, align]
|
||||
// Autoupgrade malloc instruction to malloc call.
|
||||
// FIXME: Remove in LLVM 3.0.
|
||||
if (Record.size() < 3)
|
||||
return Error("Invalid MALLOC record");
|
||||
case bitc::FUNC_CODE_INST_ALLOCA: { // ALLOCA: [instty, opty, op, align]
|
||||
if (Record.size() != 4)
|
||||
return Error("Invalid ALLOCA record");
|
||||
const PointerType *Ty =
|
||||
dyn_cast_or_null<PointerType>(getTypeByID(Record[0]));
|
||||
Value *Size = getFnValueByID(Record[1], Type::getInt32Ty(Context));
|
||||
if (!Ty || !Size) return Error("Invalid MALLOC record");
|
||||
if (!CurBB) return Error("Invalid malloc instruction with no BB");
|
||||
const Type *Int32Ty = IntegerType::getInt32Ty(CurBB->getContext());
|
||||
Constant *AllocSize = ConstantExpr::getSizeOf(Ty->getElementType());
|
||||
AllocSize = ConstantExpr::getTruncOrBitCast(AllocSize, Int32Ty);
|
||||
I = CallInst::CreateMalloc(CurBB, Int32Ty, Ty->getElementType(),
|
||||
AllocSize, Size, NULL);
|
||||
InstructionList.push_back(I);
|
||||
break;
|
||||
}
|
||||
case bitc::FUNC_CODE_INST_FREE: { // FREE: [op, opty]
|
||||
unsigned OpNum = 0;
|
||||
Value *Op;
|
||||
if (getValueTypePair(Record, OpNum, NextValueNo, Op) ||
|
||||
OpNum != Record.size())
|
||||
return Error("Invalid FREE record");
|
||||
if (!CurBB) return Error("Invalid free instruction with no BB");
|
||||
I = CallInst::CreateFree(Op, CurBB);
|
||||
InstructionList.push_back(I);
|
||||
break;
|
||||
}
|
||||
case bitc::FUNC_CODE_INST_ALLOCA: { // ALLOCA: [instty, opty, op, align]
|
||||
// For backward compatibility, tolerate a lack of an opty, and use i32.
|
||||
// Remove this in LLVM 3.0.
|
||||
if (Record.size() < 3 || Record.size() > 4)
|
||||
return Error("Invalid ALLOCA record");
|
||||
unsigned OpNum = 0;
|
||||
const PointerType *Ty =
|
||||
dyn_cast_or_null<PointerType>(getTypeByID(Record[OpNum++]));
|
||||
const Type *OpTy = Record.size() == 4 ? getTypeByID(Record[OpNum++]) :
|
||||
Type::getInt32Ty(Context);
|
||||
Value *Size = getFnValueByID(Record[OpNum++], OpTy);
|
||||
unsigned Align = Record[OpNum++];
|
||||
const Type *OpTy = getTypeByID(Record[1]);
|
||||
Value *Size = getFnValueByID(Record[2], OpTy);
|
||||
unsigned Align = Record[3];
|
||||
if (!Ty || !Size) return Error("Invalid ALLOCA record");
|
||||
I = new AllocaInst(Ty->getElementType(), Size, (1 << Align) >> 1);
|
||||
InstructionList.push_back(I);
|
||||
@ -2352,22 +2287,6 @@ bool BitcodeReader::ParseFunctionBody(Function *F) {
|
||||
InstructionList.push_back(I);
|
||||
break;
|
||||
}
|
||||
case bitc::FUNC_CODE_INST_STORE: { // STORE:[val, valty, ptr, align, vol]
|
||||
// FIXME: Legacy form of store instruction. Should be removed in LLVM 3.0.
|
||||
unsigned OpNum = 0;
|
||||
Value *Val, *Ptr;
|
||||
if (getValueTypePair(Record, OpNum, NextValueNo, Val) ||
|
||||
getValue(Record, OpNum,
|
||||
PointerType::getUnqual(Val->getType()), Ptr)||
|
||||
OpNum+2 != Record.size())
|
||||
return Error("Invalid STORE record");
|
||||
|
||||
I = new StoreInst(Val, Ptr, Record[OpNum+1], (1 << Record[OpNum]) >> 1);
|
||||
InstructionList.push_back(I);
|
||||
break;
|
||||
}
|
||||
// FIXME: Remove this in LLVM 3.0.
|
||||
case bitc::FUNC_CODE_INST_CALL:
|
||||
case bitc::FUNC_CODE_INST_CALL2: {
|
||||
// CALL: [paramattrs, cc, fnty, fnid, arg0, arg1...]
|
||||
if (Record.size() < 3)
|
||||
|
||||
@ -1,8 +0,0 @@
|
||||
; This isn't really an assembly file. It just runs test on bitcode to ensure
|
||||
; it is auto-upgraded.
|
||||
; RUN: llvm-dis < %s.bc | FileCheck %s
|
||||
; CHECK-NOT: {i32 @llvm\\.ct}
|
||||
; CHECK-NOT: {llvm\\.part\\.set\\.i\[0-9\]*\\.i\[0-9\]*\\.i\[0-9\]*}
|
||||
; CHECK-NOT: {llvm\\.part\\.select\\.i\[0-9\]*\\.i\[0-9\]*}
|
||||
; CHECK-NOT: {llvm\\.bswap\\.i\[0-9\]*\\.i\[0-9\]*}
|
||||
|
||||
Binary file not shown.
@ -1,206 +0,0 @@
|
||||
; RUN: llvm-dis < %s.bc | FileCheck %s
|
||||
|
||||
; vmovls should be auto-upgraded to sext
|
||||
|
||||
; CHECK: vmovls8
|
||||
; CHECK-NOT: arm.neon.vmovls.v8i16
|
||||
; CHECK: sext <8 x i8>
|
||||
|
||||
; CHECK: vmovls16
|
||||
; CHECK-NOT: arm.neon.vmovls.v4i32
|
||||
; CHECK: sext <4 x i16>
|
||||
|
||||
; CHECK: vmovls32
|
||||
; CHECK-NOT: arm.neon.vmovls.v2i64
|
||||
; CHECK: sext <2 x i32>
|
||||
|
||||
; vmovlu should be auto-upgraded to zext
|
||||
|
||||
; CHECK: vmovlu8
|
||||
; CHECK-NOT: arm.neon.vmovlu.v8i16
|
||||
; CHECK: zext <8 x i8>
|
||||
|
||||
; CHECK: vmovlu16
|
||||
; CHECK-NOT: arm.neon.vmovlu.v4i32
|
||||
; CHECK: zext <4 x i16>
|
||||
|
||||
; CHECK: vmovlu32
|
||||
; CHECK-NOT: arm.neon.vmovlu.v2i64
|
||||
; CHECK: zext <2 x i32>
|
||||
|
||||
; vaddl/vaddw should be auto-upgraded to add with sext/zext
|
||||
|
||||
; CHECK: vaddls16
|
||||
; CHECK-NOT: arm.neon.vaddls.v4i32
|
||||
; CHECK: sext <4 x i16>
|
||||
; CHECK-NEXT: sext <4 x i16>
|
||||
; CHECK-NEXT: add <4 x i32>
|
||||
|
||||
; CHECK: vaddlu32
|
||||
; CHECK-NOT: arm.neon.vaddlu.v2i64
|
||||
; CHECK: zext <2 x i32>
|
||||
; CHECK-NEXT: zext <2 x i32>
|
||||
; CHECK-NEXT: add <2 x i64>
|
||||
|
||||
; CHECK: vaddws8
|
||||
; CHECK-NOT: arm.neon.vaddws.v8i16
|
||||
; CHECK: sext <8 x i8>
|
||||
; CHECK-NEXT: add <8 x i16>
|
||||
|
||||
; CHECK: vaddwu16
|
||||
; CHECK-NOT: arm.neon.vaddwu.v4i32
|
||||
; CHECK: zext <4 x i16>
|
||||
; CHECK-NEXT: add <4 x i32>
|
||||
|
||||
; vsubl/vsubw should be auto-upgraded to subtract with sext/zext
|
||||
|
||||
; CHECK: vsubls16
|
||||
; CHECK-NOT: arm.neon.vsubls.v4i32
|
||||
; CHECK: sext <4 x i16>
|
||||
; CHECK-NEXT: sext <4 x i16>
|
||||
; CHECK-NEXT: sub <4 x i32>
|
||||
|
||||
; CHECK: vsublu32
|
||||
; CHECK-NOT: arm.neon.vsublu.v2i64
|
||||
; CHECK: zext <2 x i32>
|
||||
; CHECK-NEXT: zext <2 x i32>
|
||||
; CHECK-NEXT: sub <2 x i64>
|
||||
|
||||
; CHECK: vsubws8
|
||||
; CHECK-NOT: arm.neon.vsubws.v8i16
|
||||
; CHECK: sext <8 x i8>
|
||||
; CHECK-NEXT: sub <8 x i16>
|
||||
|
||||
; CHECK: vsubwu16
|
||||
; CHECK-NOT: arm.neon.vsubwu.v4i32
|
||||
; CHECK: zext <4 x i16>
|
||||
; CHECK-NEXT: sub <4 x i32>
|
||||
|
||||
; vmull* intrinsics will remain intrinsics
|
||||
|
||||
; CHECK: vmulls8
|
||||
; CHECK: arm.neon.vmulls.v8i16
|
||||
|
||||
; CHECK: vmullu16
|
||||
; CHECK: arm.neon.vmullu.v4i32
|
||||
|
||||
; CHECK: vmullp8
|
||||
; CHECK: arm.neon.vmullp.v8i16
|
||||
|
||||
; vmlal should be auto-upgraded to multiply/add with sext/zext
|
||||
|
||||
; CHECK: vmlals32
|
||||
; CHECK-NOT: arm.neon.vmlals.v2i64
|
||||
; CHECK: sext <2 x i32>
|
||||
; CHECK-NEXT: sext <2 x i32>
|
||||
; CHECK-NEXT: mul <2 x i64>
|
||||
; CHECK-NEXT: add <2 x i64>
|
||||
|
||||
; CHECK: vmlalu8
|
||||
; CHECK-NOT: arm.neon.vmlalu.v8i16
|
||||
; CHECK: zext <8 x i8>
|
||||
; CHECK-NEXT: zext <8 x i8>
|
||||
; CHECK-NEXT: mul <8 x i16>
|
||||
; CHECK-NEXT: add <8 x i16>
|
||||
|
||||
; vmlsl should be auto-upgraded to multiply/sub with sext/zext
|
||||
|
||||
; CHECK: vmlsls16
|
||||
; CHECK-NOT: arm.neon.vmlsls.v4i32
|
||||
; CHECK: sext <4 x i16>
|
||||
; CHECK-NEXT: sext <4 x i16>
|
||||
; CHECK-NEXT: mul <4 x i32>
|
||||
; CHECK-NEXT: sub <4 x i32>
|
||||
|
||||
; CHECK: vmlslu32
|
||||
; CHECK-NOT: arm.neon.vmlslu.v2i64
|
||||
; CHECK: zext <2 x i32>
|
||||
; CHECK-NEXT: zext <2 x i32>
|
||||
; CHECK-NEXT: mul <2 x i64>
|
||||
; CHECK-NEXT: sub <2 x i64>
|
||||
|
||||
; vaba should be auto-upgraded to vabd + add
|
||||
|
||||
; CHECK: vabas32
|
||||
; CHECK-NOT: arm.neon.vabas.v2i32
|
||||
; CHECK: arm.neon.vabds.v2i32
|
||||
; CHECK-NEXT: add <2 x i32>
|
||||
|
||||
; CHECK: vabaQu8
|
||||
; CHECK-NOT: arm.neon.vabau.v16i8
|
||||
; CHECK: arm.neon.vabdu.v16i8
|
||||
; CHECK-NEXT: add <16 x i8>
|
||||
|
||||
; vabal should be auto-upgraded to vabd with zext + add
|
||||
|
||||
; CHECK: vabals16
|
||||
; CHECK-NOT: arm.neon.vabals.v4i32
|
||||
; CHECK: arm.neon.vabds.v4i16
|
||||
; CHECK-NEXT: zext <4 x i16>
|
||||
; CHECK-NEXT: add <4 x i32>
|
||||
|
||||
; CHECK: vabalu32
|
||||
; CHECK-NOT: arm.neon.vabalu.v2i64
|
||||
; CHECK: arm.neon.vabdu.v2i32
|
||||
; CHECK-NEXT: zext <2 x i32>
|
||||
; CHECK-NEXT: add <2 x i64>
|
||||
|
||||
; vabdl should be auto-upgraded to vabd with zext
|
||||
|
||||
; CHECK: vabdls8
|
||||
; CHECK-NOT: arm.neon.vabdls.v8i16
|
||||
; CHECK: arm.neon.vabds.v8i8
|
||||
; CHECK-NEXT: zext <8 x i8>
|
||||
|
||||
; CHECK: vabdlu16
|
||||
; CHECK-NOT: arm.neon.vabdlu.v4i32
|
||||
; CHECK: arm.neon.vabdu.v4i16
|
||||
; CHECK-NEXT: zext <4 x i16>
|
||||
|
||||
; vmovn should be auto-upgraded to trunc
|
||||
|
||||
; CHECK: vmovni16
|
||||
; CHECK-NOT: arm.neon.vmovn.v8i8
|
||||
; CHECK: trunc <8 x i16>
|
||||
|
||||
; CHECK: vmovni32
|
||||
; CHECK-NOT: arm.neon.vmovn.v4i16
|
||||
; CHECK: trunc <4 x i32>
|
||||
|
||||
; CHECK: vmovni64
|
||||
; CHECK-NOT: arm.neon.vmovn.v2i32
|
||||
; CHECK: trunc <2 x i64>
|
||||
|
||||
; vld* and vst* intrinsic calls need an alignment argument (defaulted to 1)
|
||||
|
||||
; CHECK: vld1i8
|
||||
; CHECK: i32 1
|
||||
; CHECK: vld2Qi16
|
||||
; CHECK: i32 1
|
||||
; CHECK: vld3i32
|
||||
; CHECK: i32 1
|
||||
; CHECK: vld4Qf
|
||||
; CHECK: i32 1
|
||||
|
||||
; CHECK: vst1i8
|
||||
; CHECK: i32 1
|
||||
; CHECK: vst2Qi16
|
||||
; CHECK: i32 1
|
||||
; CHECK: vst3i32
|
||||
; CHECK: i32 1
|
||||
; CHECK: vst4Qf
|
||||
; CHECK: i32 1
|
||||
|
||||
; CHECK: vld2laneQi16
|
||||
; CHECK: i32 1
|
||||
; CHECK: vld3lanei32
|
||||
; CHECK: i32 1
|
||||
; CHECK: vld4laneQf
|
||||
; CHECK: i32 1
|
||||
|
||||
; CHECK: vst2laneQi16
|
||||
; CHECK: i32 1
|
||||
; CHECK: vst3lanei32
|
||||
; CHECK: i32 1
|
||||
; CHECK: vst4laneQf
|
||||
; CHECK: i32 1
|
||||
Binary file not shown.
@ -1,3 +0,0 @@
|
||||
; RUN: llvm-dis < %s.bc | FileCheck %s
|
||||
; CHECK-NOT: {i32 @llvm\\.loadl.pd}
|
||||
; CHECK: shufflevector
|
||||
Binary file not shown.
@ -1,3 +0,0 @@
|
||||
; RUN: llvm-dis < %s.bc | FileCheck %s
|
||||
; CHECK-NOT: {i32 @llvm\\.movl.dq}
|
||||
; CHECK: shufflevector
|
||||
Binary file not shown.
@ -1,3 +0,0 @@
|
||||
; RUN: llvm-dis < %s.bc | FileCheck %s
|
||||
; CHECK-NOT: {i32 @llvm\\.movs.d}
|
||||
; CHECK: shufflevector
|
||||
Binary file not shown.
@ -1,4 +0,0 @@
|
||||
; RUN: llvm-dis < %s.bc | FileCheck %s
|
||||
; CHECK-NOT: {i32 @llvm\\.punpckh.qdq}
|
||||
; CHECK-NOT: {i32 @llvm\\.punpckl.qdq}
|
||||
; CHECK: shufflevector
|
||||
Binary file not shown.
@ -1,3 +0,0 @@
|
||||
; RUN: llvm-dis < %s.bc | FileCheck %s
|
||||
; CHECK-NOT: {i32 @llvm\\.shuf.pd}
|
||||
; CHECK: shufflevector
|
||||
Binary file not shown.
@ -1,4 +0,0 @@
|
||||
; RUN: llvm-dis < %s.bc | FileCheck %s
|
||||
; CHECK-NOT: {i32 @llvm\\.unpckh.pd}
|
||||
; CHECK-NOT: {i32 @llvm\\.unpckl.pd}
|
||||
; CHECK: shufflevector
|
||||
Binary file not shown.
@ -1,3 +0,0 @@
|
||||
; RUN: llvm-dis < %s.bc | FileCheck %s
|
||||
; CHECK-NOT: {i32 @llvm\\.pmulld}
|
||||
; CHECK: mul
|
||||
Binary file not shown.
@ -230,20 +230,14 @@ static const char *GetCodeName(unsigned CodeID, unsigned BlockID,
|
||||
case bitc::FUNC_CODE_INST_UNREACHABLE: return "INST_UNREACHABLE";
|
||||
|
||||
case bitc::FUNC_CODE_INST_PHI: return "INST_PHI";
|
||||
case bitc::FUNC_CODE_INST_MALLOC: return "INST_MALLOC";
|
||||
case bitc::FUNC_CODE_INST_FREE: return "INST_FREE";
|
||||
case bitc::FUNC_CODE_INST_ALLOCA: return "INST_ALLOCA";
|
||||
case bitc::FUNC_CODE_INST_LOAD: return "INST_LOAD";
|
||||
case bitc::FUNC_CODE_INST_STORE: return "INST_STORE";
|
||||
case bitc::FUNC_CODE_INST_CALL: return "INST_CALL";
|
||||
case bitc::FUNC_CODE_INST_VAARG: return "INST_VAARG";
|
||||
case bitc::FUNC_CODE_INST_STORE2: return "INST_STORE2";
|
||||
case bitc::FUNC_CODE_INST_GETRESULT: return "INST_GETRESULT";
|
||||
case bitc::FUNC_CODE_INST_EXTRACTVAL: return "INST_EXTRACTVAL";
|
||||
case bitc::FUNC_CODE_INST_INSERTVAL: return "INST_INSERTVAL";
|
||||
case bitc::FUNC_CODE_INST_CMP2: return "INST_CMP2";
|
||||
case bitc::FUNC_CODE_INST_VSELECT: return "INST_VSELECT";
|
||||
case bitc::FUNC_CODE_DEBUG_LOC: return "DEBUG_LOC";
|
||||
case bitc::FUNC_CODE_DEBUG_LOC_AGAIN: return "DEBUG_LOC_AGAIN";
|
||||
case bitc::FUNC_CODE_INST_CALL2: return "INST_CALL2";
|
||||
case bitc::FUNC_CODE_DEBUG_LOC2: return "DEBUG_LOC2";
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user