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Implement the newly added ACLE functions for ld1/st1 with 2/3/4 vectors.

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The functions are like: vst1_s8_x2 ...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194990 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hao Liu
2013-11-18 06:31:53 +00:00
parent 65c102e7fb
commit 97577757c6
7 changed files with 1533 additions and 146 deletions
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27
include/llvm/IR/IntrinsicsAArch64.td
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@@ -163,6 +163,33 @@ def int_aarch64_neon_vtbx4 :
LLVMMatchType<1>, LLVMMatchType<1>, LLVMMatchType<0>],
[IntrNoMem]>;
// Vector Load/store
def int_aarch64_neon_vld1x2 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
[llvm_ptr_ty, llvm_i32_ty],
[IntrReadArgMem]>;
def int_aarch64_neon_vld1x3 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
LLVMMatchType<0>],
[llvm_ptr_ty, llvm_i32_ty],
[IntrReadArgMem]>;
def int_aarch64_neon_vld1x4 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
LLVMMatchType<0>, LLVMMatchType<0>],
[llvm_ptr_ty, llvm_i32_ty],
[IntrReadArgMem]>;
def int_aarch64_neon_vst1x2 : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>, llvm_i32_ty],
[IntrReadWriteArgMem]>;
def int_aarch64_neon_vst1x3 : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>, LLVMMatchType<0>,
llvm_i32_ty], [IntrReadWriteArgMem]>;
def int_aarch64_neon_vst1x4 : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>, LLVMMatchType<0>,
LLVMMatchType<0>, llvm_i32_ty],
[IntrReadWriteArgMem]>;
// Scalar Add
def int_aarch64_neon_vaddds :
Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;