mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-07 11:33:44 +00:00
Naming convention and whitespace. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156342 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
parent
defa0afa14
commit
9790266eea
@ -97,64 +97,64 @@ namespace {
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/// been remat'ed.
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SmallPtrSet<MachineInstr*, 8> ReMatDefs;
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/// joinIntervals - join compatible live intervals
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void joinIntervals();
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/// joinAllIntervals - join compatible live intervals
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void joinAllIntervals();
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/// CopyCoalesceInMBB - Coalesce copies in the specified MBB, putting
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/// copyCoalesceInMBB - Coalesce copies in the specified MBB, putting
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/// copies that cannot yet be coalesced into the "TryAgain" list.
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void CopyCoalesceInMBB(MachineBasicBlock *MBB,
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void copyCoalesceInMBB(MachineBasicBlock *MBB,
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std::vector<MachineInstr*> &TryAgain);
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/// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
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/// joinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
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/// which are the src/dst of the copy instruction CopyMI. This returns
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/// true if the copy was successfully coalesced away. If it is not
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/// currently possible to coalesce this interval, but it may be possible if
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/// other things get coalesced, then it returns true by reference in
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/// 'Again'.
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bool JoinCopy(MachineInstr *TheCopy, bool &Again);
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bool joinCopy(MachineInstr *TheCopy, bool &Again);
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/// JoinIntervals - Attempt to join these two intervals. On failure, this
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/// joinIntervals - Attempt to join these two intervals. On failure, this
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/// returns false. The output "SrcInt" will not have been modified, so we
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/// can use this information below to update aliases.
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bool JoinIntervals(CoalescerPair &CP);
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bool joinIntervals(CoalescerPair &CP);
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/// AdjustCopiesBackFrom - We found a non-trivially-coalescable copy. If
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/// adjustCopiesBackFrom - We found a non-trivially-coalescable copy. If
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/// the source value number is defined by a copy from the destination reg
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/// see if we can merge these two destination reg valno# into a single
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/// value number, eliminating a copy.
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bool AdjustCopiesBackFrom(const CoalescerPair &CP, MachineInstr *CopyMI);
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bool adjustCopiesBackFrom(const CoalescerPair &CP, MachineInstr *CopyMI);
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/// HasOtherReachingDefs - Return true if there are definitions of IntB
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/// hasOtherReachingDefs - Return true if there are definitions of IntB
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/// other than BValNo val# that can reach uses of AValno val# of IntA.
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bool HasOtherReachingDefs(LiveInterval &IntA, LiveInterval &IntB,
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bool hasOtherReachingDefs(LiveInterval &IntA, LiveInterval &IntB,
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VNInfo *AValNo, VNInfo *BValNo);
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/// RemoveCopyByCommutingDef - We found a non-trivially-coalescable copy.
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/// removeCopyByCommutingDef - We found a non-trivially-coalescable copy.
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/// If the source value number is defined by a commutable instruction and
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/// its other operand is coalesced to the copy dest register, see if we
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/// can transform the copy into a noop by commuting the definition.
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bool RemoveCopyByCommutingDef(const CoalescerPair &CP,MachineInstr *CopyMI);
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bool removeCopyByCommutingDef(const CoalescerPair &CP,MachineInstr *CopyMI);
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/// ReMaterializeTrivialDef - If the source of a copy is defined by a
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/// reMaterializeTrivialDef - If the source of a copy is defined by a
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/// trivial computation, replace the copy by rematerialize the definition.
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/// If PreserveSrcInt is true, make sure SrcInt is valid after the call.
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bool ReMaterializeTrivialDef(LiveInterval &SrcInt, bool PreserveSrcInt,
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bool reMaterializeTrivialDef(LiveInterval &SrcInt, bool PreserveSrcInt,
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unsigned DstReg, MachineInstr *CopyMI);
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/// shouldJoinPhys - Return true if a physreg copy should be joined.
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bool shouldJoinPhys(CoalescerPair &CP);
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/// UpdateRegDefsUses - Replace all defs and uses of SrcReg to DstReg and
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/// updateRegDefsUses - Replace all defs and uses of SrcReg to DstReg and
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/// update the subregister number if it is not zero. If DstReg is a
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/// physical register and the existing subregister number of the def / use
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/// being updated is not zero, make sure to set it to the correct physical
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/// subregister.
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void UpdateRegDefsUses(const CoalescerPair &CP);
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void updateRegDefsUses(const CoalescerPair &CP);
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/// RemoveDeadDef - If a def of a live interval is now determined dead,
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/// removeDeadDef - If a def of a live interval is now determined dead,
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/// remove the val# it defines. If the live interval becomes empty, remove
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/// it as well.
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bool RemoveDeadDef(LiveInterval &li, MachineInstr *DefMI);
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bool removeDeadDef(LiveInterval &li, MachineInstr *DefMI);
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/// markAsJoined - Remember that CopyMI has already been joined.
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void markAsJoined(MachineInstr *CopyMI);
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@ -385,7 +385,7 @@ void RegisterCoalescer::markAsJoined(MachineInstr *CopyMI) {
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I->setIsUndef(true);
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}
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/// AdjustCopiesBackFrom - We found a non-trivially-coalescable copy with IntA
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/// adjustCopiesBackFrom - We found a non-trivially-coalescable copy with IntA
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/// being the source and IntB being the dest, thus this defines a value number
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/// in IntB. If the source value number (in IntA) is defined by a copy from B,
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/// see if we can merge these two pieces of B into a single value number,
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@ -400,8 +400,8 @@ void RegisterCoalescer::markAsJoined(MachineInstr *CopyMI) {
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///
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/// This returns true if an interval was modified.
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///
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bool RegisterCoalescer::AdjustCopiesBackFrom(const CoalescerPair &CP,
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MachineInstr *CopyMI) {
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bool RegisterCoalescer::adjustCopiesBackFrom(const CoalescerPair &CP,
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MachineInstr *CopyMI) {
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// Bail if there is no dst interval - can happen when merging physical subreg
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// operations.
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if (!LIS->hasInterval(CP.getDstReg()))
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@ -532,12 +532,12 @@ bool RegisterCoalescer::AdjustCopiesBackFrom(const CoalescerPair &CP,
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return true;
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}
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/// HasOtherReachingDefs - Return true if there are definitions of IntB
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/// hasOtherReachingDefs - Return true if there are definitions of IntB
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/// other than BValNo val# that can reach uses of AValno val# of IntA.
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bool RegisterCoalescer::HasOtherReachingDefs(LiveInterval &IntA,
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LiveInterval &IntB,
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VNInfo *AValNo,
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VNInfo *BValNo) {
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bool RegisterCoalescer::hasOtherReachingDefs(LiveInterval &IntA,
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LiveInterval &IntB,
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VNInfo *AValNo,
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VNInfo *BValNo) {
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for (LiveInterval::iterator AI = IntA.begin(), AE = IntA.end();
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AI != AE; ++AI) {
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if (AI->valno != AValNo) continue;
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@ -557,7 +557,7 @@ bool RegisterCoalescer::HasOtherReachingDefs(LiveInterval &IntA,
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return false;
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}
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/// RemoveCopyByCommutingDef - We found a non-trivially-coalescable copy with
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/// removeCopyByCommutingDef - We found a non-trivially-coalescable copy with
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/// IntA being the source and IntB being the dest, thus this defines a value
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/// number in IntB. If the source value number (in IntA) is defined by a
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/// commutable instruction and its other operand is coalesced to the copy dest
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@ -580,8 +580,8 @@ bool RegisterCoalescer::HasOtherReachingDefs(LiveInterval &IntA,
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///
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/// This returns true if an interval was modified.
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///
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bool RegisterCoalescer::RemoveCopyByCommutingDef(const CoalescerPair &CP,
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MachineInstr *CopyMI) {
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bool RegisterCoalescer::removeCopyByCommutingDef(const CoalescerPair &CP,
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MachineInstr *CopyMI) {
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// FIXME: For now, only eliminate the copy by commuting its def when the
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// source register is a virtual register. We want to guard against cases
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// where the copy is a back edge copy and commuting the def lengthen the
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@ -645,7 +645,7 @@ bool RegisterCoalescer::RemoveCopyByCommutingDef(const CoalescerPair &CP,
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// Make sure there are no other definitions of IntB that would reach the
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// uses which the new definition can reach.
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if (HasOtherReachingDefs(IntA, IntB, AValNo, BValNo))
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if (hasOtherReachingDefs(IntA, IntB, AValNo, BValNo))
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return false;
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// Abort if the aliases of IntB.reg have values that are not simply the
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@ -653,7 +653,7 @@ bool RegisterCoalescer::RemoveCopyByCommutingDef(const CoalescerPair &CP,
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if (TargetRegisterInfo::isPhysicalRegister(IntB.reg))
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for (const uint16_t *AS = TRI->getAliasSet(IntB.reg); *AS; ++AS)
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if (LIS->hasInterval(*AS) &&
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HasOtherReachingDefs(IntA, LIS->getInterval(*AS), AValNo, 0))
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hasOtherReachingDefs(IntA, LIS->getInterval(*AS), AValNo, 0))
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return false;
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// If some of the uses of IntA.reg is already coalesced away, return false.
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@ -670,7 +670,7 @@ bool RegisterCoalescer::RemoveCopyByCommutingDef(const CoalescerPair &CP,
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return false;
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}
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DEBUG(dbgs() << "\tRemoveCopyByCommutingDef: " << AValNo->def << '\t'
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DEBUG(dbgs() << "\tremoveCopyByCommutingDef: " << AValNo->def << '\t'
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<< *DefMI);
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// At this point we have decided that it is legal to do this
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@ -760,12 +760,12 @@ bool RegisterCoalescer::RemoveCopyByCommutingDef(const CoalescerPair &CP,
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return true;
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}
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/// ReMaterializeTrivialDef - If the source of a copy is defined by a trivial
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/// reMaterializeTrivialDef - If the source of a copy is defined by a trivial
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/// computation, replace the copy by rematerialize the definition.
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bool RegisterCoalescer::ReMaterializeTrivialDef(LiveInterval &SrcInt,
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bool preserveSrcInt,
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unsigned DstReg,
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MachineInstr *CopyMI) {
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bool RegisterCoalescer::reMaterializeTrivialDef(LiveInterval &SrcInt,
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bool preserveSrcInt,
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unsigned DstReg,
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MachineInstr *CopyMI) {
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SlotIndex CopyIdx = LIS->getInstructionIndex(CopyMI).getRegSlot(true);
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LiveInterval::iterator SrcLR = SrcInt.FindLiveRangeContaining(CopyIdx);
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assert(SrcLR != SrcInt.end() && "Live range not found!");
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@ -900,13 +900,12 @@ bool RegisterCoalescer::eliminateUndefCopy(MachineInstr *CopyMI,
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return true;
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}
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/// UpdateRegDefsUses - Replace all defs and uses of SrcReg to DstReg and
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/// updateRegDefsUses - Replace all defs and uses of SrcReg to DstReg and
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/// update the subregister number if it is not zero. If DstReg is a
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/// physical register and the existing subregister number of the def / use
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/// being updated is not zero, make sure to set it to the correct physical
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/// subregister.
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void
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RegisterCoalescer::UpdateRegDefsUses(const CoalescerPair &CP) {
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void RegisterCoalescer::updateRegDefsUses(const CoalescerPair &CP) {
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bool DstIsPhys = CP.isPhys();
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unsigned SrcReg = CP.getSrcReg();
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unsigned DstReg = CP.getDstReg();
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@ -925,7 +924,7 @@ RegisterCoalescer::UpdateRegDefsUses(const CoalescerPair &CP) {
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UseMI->getOperand(0).getReg() != SrcReg &&
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UseMI->getOperand(0).getReg() != DstReg &&
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!JoinedCopies.count(UseMI) &&
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ReMaterializeTrivialDef(LIS->getInterval(SrcReg), false,
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reMaterializeTrivialDef(LIS->getInterval(SrcReg), false,
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UseMI->getOperand(0).getReg(), UseMI))
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continue;
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}
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@ -985,10 +984,9 @@ static bool removeIntervalIfEmpty(LiveInterval &li, LiveIntervals *LIS,
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return false;
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}
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/// RemoveDeadDef - If a def of a live interval is now determined dead, remove
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/// removeDeadDef - If a def of a live interval is now determined dead, remove
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/// the val# it defines. If the live interval becomes empty, remove it as well.
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bool RegisterCoalescer::RemoveDeadDef(LiveInterval &li,
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MachineInstr *DefMI) {
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bool RegisterCoalescer::removeDeadDef(LiveInterval &li, MachineInstr *DefMI) {
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SlotIndex DefIdx = LIS->getInstructionIndex(DefMI).getRegSlot();
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LiveInterval::iterator MLR = li.FindLiveRangeContaining(DefIdx);
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if (DefIdx != MLR->valno->def)
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@ -1051,12 +1049,12 @@ bool RegisterCoalescer::shouldJoinPhys(CoalescerPair &CP) {
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}
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/// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
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/// joinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
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/// which are the src/dst of the copy instruction CopyMI. This returns true
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/// if the copy was successfully coalesced away. If it is not currently
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/// possible to coalesce this interval, but it may be possible if other
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/// things get coalesced, then it returns true by reference in 'Again'.
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bool RegisterCoalescer::JoinCopy(MachineInstr *CopyMI, bool &Again) {
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bool RegisterCoalescer::joinCopy(MachineInstr *CopyMI, bool &Again) {
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Again = false;
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if (JoinedCopies.count(CopyMI) || ReMatCopies.count(CopyMI))
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@ -1094,7 +1092,7 @@ bool RegisterCoalescer::JoinCopy(MachineInstr *CopyMI, bool &Again) {
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// Before giving up coalescing, if definition of source is defined by
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// trivial computation, try rematerializing it.
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if (!CP.isFlipped() &&
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ReMaterializeTrivialDef(LIS->getInterval(CP.getSrcReg()), true,
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reMaterializeTrivialDef(LIS->getInterval(CP.getSrcReg()), true,
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CP.getDstReg(), CopyMI))
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return true;
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return false;
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@ -1115,20 +1113,20 @@ bool RegisterCoalescer::JoinCopy(MachineInstr *CopyMI, bool &Again) {
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// Otherwise, if one of the intervals being joined is a physreg, this method
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// always canonicalizes DstInt to be it. The output "SrcInt" will not have
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// been modified, so we can use this information below to update aliases.
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if (!JoinIntervals(CP)) {
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if (!joinIntervals(CP)) {
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// Coalescing failed.
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// If definition of source is defined by trivial computation, try
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// rematerializing it.
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if (!CP.isFlipped() &&
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ReMaterializeTrivialDef(LIS->getInterval(CP.getSrcReg()), true,
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reMaterializeTrivialDef(LIS->getInterval(CP.getSrcReg()), true,
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CP.getDstReg(), CopyMI))
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return true;
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// If we can eliminate the copy without merging the live ranges, do so now.
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if (!CP.isPartial()) {
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if (AdjustCopiesBackFrom(CP, CopyMI) ||
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RemoveCopyByCommutingDef(CP, CopyMI)) {
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if (adjustCopiesBackFrom(CP, CopyMI) ||
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removeCopyByCommutingDef(CP, CopyMI)) {
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markAsJoined(CopyMI);
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DEBUG(dbgs() << "\tTrivial!\n");
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return true;
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@ -1151,13 +1149,13 @@ bool RegisterCoalescer::JoinCopy(MachineInstr *CopyMI, bool &Again) {
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// Remember to delete the copy instruction.
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markAsJoined(CopyMI);
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UpdateRegDefsUses(CP);
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updateRegDefsUses(CP);
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// If we have extended the live range of a physical register, make sure we
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// update live-in lists as well.
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if (CP.isPhys()) {
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SmallVector<MachineBasicBlock*, 16> BlockSeq;
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// JoinIntervals invalidates the VNInfos in SrcInt, but we only need the
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// joinIntervals invalidates the VNInfos in SrcInt, but we only need the
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// ranges for this, and they are preserved.
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LiveInterval &SrcInt = LIS->getInterval(CP.getSrcReg());
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for (LiveInterval::const_iterator I = SrcInt.begin(), E = SrcInt.end();
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@ -1311,9 +1309,9 @@ static bool RegistersDefinedFromSameValue(LiveIntervals &li,
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return true;
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}
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/// JoinIntervals - Attempt to join these two intervals. On failure, this
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/// joinIntervals - Attempt to join these two intervals. On failure, this
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/// returns false.
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bool RegisterCoalescer::JoinIntervals(CoalescerPair &CP) {
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bool RegisterCoalescer::joinIntervals(CoalescerPair &CP) {
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LiveInterval &RHS = LIS->getInterval(CP.getSrcReg());
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DEBUG({ dbgs() << "\t\tRHS = "; RHS.print(dbgs(), TRI); dbgs() << "\n"; });
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@ -1614,8 +1612,9 @@ namespace {
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};
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}
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void RegisterCoalescer::CopyCoalesceInMBB(MachineBasicBlock *MBB,
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std::vector<MachineInstr*> &TryAgain) {
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void
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RegisterCoalescer::copyCoalesceInMBB(MachineBasicBlock *MBB,
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std::vector<MachineInstr*> &TryAgain) {
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DEBUG(dbgs() << MBB->getName() << ":\n");
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SmallVector<MachineInstr*, 8> VirtCopies;
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@ -1652,27 +1651,27 @@ void RegisterCoalescer::CopyCoalesceInMBB(MachineBasicBlock *MBB,
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for (unsigned i = 0, e = ImpDefCopies.size(); i != e; ++i) {
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MachineInstr *TheCopy = ImpDefCopies[i];
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bool Again = false;
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if (!JoinCopy(TheCopy, Again))
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if (!joinCopy(TheCopy, Again))
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if (Again)
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TryAgain.push_back(TheCopy);
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}
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for (unsigned i = 0, e = PhysCopies.size(); i != e; ++i) {
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MachineInstr *TheCopy = PhysCopies[i];
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bool Again = false;
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if (!JoinCopy(TheCopy, Again))
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if (!joinCopy(TheCopy, Again))
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if (Again)
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TryAgain.push_back(TheCopy);
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}
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for (unsigned i = 0, e = VirtCopies.size(); i != e; ++i) {
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MachineInstr *TheCopy = VirtCopies[i];
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bool Again = false;
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if (!JoinCopy(TheCopy, Again))
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if (!joinCopy(TheCopy, Again))
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if (Again)
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TryAgain.push_back(TheCopy);
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}
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}
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void RegisterCoalescer::joinIntervals() {
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void RegisterCoalescer::joinAllIntervals() {
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DEBUG(dbgs() << "********** JOINING INTERVALS ***********\n");
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std::vector<MachineInstr*> TryAgainList;
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@ -1680,7 +1679,7 @@ void RegisterCoalescer::joinIntervals() {
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// If there are no loops in the function, join intervals in function order.
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for (MachineFunction::iterator I = MF->begin(), E = MF->end();
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I != E; ++I)
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CopyCoalesceInMBB(I, TryAgainList);
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copyCoalesceInMBB(I, TryAgainList);
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} else {
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// Otherwise, join intervals in inner loops before other intervals.
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// Unfortunately we can't just iterate over loop hierarchy here because
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@ -1699,7 +1698,7 @@ void RegisterCoalescer::joinIntervals() {
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// Finally, join intervals in loop nest order.
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for (unsigned i = 0, e = MBBs.size(); i != e; ++i)
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CopyCoalesceInMBB(MBBs[i].second, TryAgainList);
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copyCoalesceInMBB(MBBs[i].second, TryAgainList);
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}
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// Joining intervals can allow other intervals to be joined. Iteratively join
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@ -1714,7 +1713,7 @@ void RegisterCoalescer::joinIntervals() {
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continue;
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bool Again = false;
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bool Success = JoinCopy(TheCopy, Again);
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bool Success = joinCopy(TheCopy, Again);
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if (Success || !Again) {
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TheCopy= 0; // Mark this one as done.
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ProgressMade = true;
|
||||
@ -1751,7 +1750,7 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
|
||||
|
||||
// Join (coalesce) intervals if requested.
|
||||
if (EnableJoining) {
|
||||
joinIntervals();
|
||||
joinAllIntervals();
|
||||
DEBUG({
|
||||
dbgs() << "********** INTERVALS POST JOINING **********\n";
|
||||
for (LiveIntervals::iterator I = LIS->begin(), E = LIS->end();
|
||||
@ -1845,7 +1844,7 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
|
||||
while (!DeadDefs.empty()) {
|
||||
unsigned DeadDef = DeadDefs.back();
|
||||
DeadDefs.pop_back();
|
||||
RemoveDeadDef(LIS->getInterval(DeadDef), MI);
|
||||
removeDeadDef(LIS->getInterval(DeadDef), MI);
|
||||
}
|
||||
LIS->RemoveMachineInstrFromMaps(mii);
|
||||
mii = mbbi->erase(mii);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user