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[AVX512] Introduce fma3p_forms from AVX

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This multiclass generates the different forms: 213, 231, 132 in AVX.

132 in AVX512 is a separate class but I am planning to use this same
multiclass to generate 231 relying on the nice the null_frag trick from AVX to
disable codegen pattern for 231.

No functionality change, no change in X86.td.expanded except for the different
instruction definition names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220539 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Adam Nemet 2014-10-24 00:02:55 +00:00
parent c08a7201b7
commit 97a3cd4383
1 changed files with 36 additions and 38 deletions
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74
lib/Target/X86/X86InstrAVX512.td
View File

@ -3330,9 +3330,11 @@ let Predicates = [HasAVX512] in {
//===----------------------------------------------------------------------===//
// FMA - Fused Multiply Operations
//
let Constraints = "$src1 = $dst" in {
multiclass avx512_fma3p_rm<bits<8> opc, string OpcodeStr, SDNode OpNode,
X86VectorVTInfo _> {
// Omitting the parameter OpNode (= null_frag) disables ISel pattern matching.
multiclass avx512_fma3p_rm<bits<8> opc, string OpcodeStr, X86VectorVTInfo _,
SDPatternOperator OpNode = null_frag> {
defm r: AVX512_maskable_3src<opc, MRMSrcReg, _, (outs _.RC:$dst),
(ins _.RC:$src2, _.RC:$src3),
OpcodeStr, "$src3, $src2", "$src2, $src3",
@ -3354,45 +3356,41 @@ multiclass avx512_fma3p_rm<bits<8> opc, string OpcodeStr, SDNode OpNode,
}
} // Constraints = "$src1 = $dst"
multiclass avx512_fma3p_forms<bits<8> opc213,
string OpcodeStr, X86VectorVTInfo VTI,
SDPatternOperator OpNode> {
defm v213 : avx512_fma3p_rm<opc213, !strconcat(OpcodeStr, "213", VTI.Suffix),
VTI, OpNode>,
EVEX_V512, EVEX_CD8<VTI.EltSize, CD8VF>;
}
let ExeDomain = SSEPackedSingle in {
defm VFMADD213PSZ : avx512_fma3p_rm<0xA8, "vfmadd213ps", X86Fmadd,
v16f32_info>,
EVEX_V512, EVEX_CD8<32, CD8VF>;
defm VFMSUB213PSZ : avx512_fma3p_rm<0xAA, "vfmsub213ps", X86Fmsub,
v16f32_info>,
EVEX_V512, EVEX_CD8<32, CD8VF>;
defm VFMADDSUB213PSZ : avx512_fma3p_rm<0xA6, "vfmaddsub213ps", X86Fmaddsub,
v16f32_info>,
EVEX_V512, EVEX_CD8<32, CD8VF>;
defm VFMSUBADD213PSZ : avx512_fma3p_rm<0xA7, "vfmsubadd213ps", X86Fmsubadd,
v16f32_info>,
EVEX_V512, EVEX_CD8<32, CD8VF>;
defm VFNMADD213PSZ : avx512_fma3p_rm<0xAC, "vfnmadd213ps", X86Fnmadd,
v16f32_info>,
EVEX_V512, EVEX_CD8<32, CD8VF>;
defm VFNMSUB213PSZ : avx512_fma3p_rm<0xAE, "vfnmsub213ps", X86Fnmsub,
v16f32_info>,
EVEX_V512, EVEX_CD8<32, CD8VF>;
defm VFMADDPSZ : avx512_fma3p_forms<0xA8, "vfmadd",
v16f32_info, X86Fmadd>;
defm VFMSUBPSZ : avx512_fma3p_forms<0xAA, "vfmsub",
v16f32_info, X86Fmsub>;
defm VFMADDSUBPSZ : avx512_fma3p_forms<0xA6, "vfmaddsub",
v16f32_info, X86Fmaddsub>;
defm VFMSUBADDPSZ : avx512_fma3p_forms<0xA7, "vfmsubadd",
v16f32_info, X86Fmsubadd>;
defm VFNMADDPSZ : avx512_fma3p_forms<0xAC, "vfnmadd",
v16f32_info, X86Fnmadd>;
defm VFNMSUBPSZ : avx512_fma3p_forms<0xAE, "vfnmsub",
v16f32_info, X86Fnmsub>;
}
let ExeDomain = SSEPackedDouble in {
defm VFMADD213PDZ : avx512_fma3p_rm<0xA8, "vfmadd213pd", X86Fmadd,
v8f64_info>,
EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
defm VFMSUB213PDZ : avx512_fma3p_rm<0xAA, "vfmsub213pd", X86Fmsub,
v8f64_info>,
EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
defm VFMADDSUB213PDZ : avx512_fma3p_rm<0xA6, "vfmaddsub213pd", X86Fmaddsub,
v8f64_info>,
EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
defm VFMSUBADD213PDZ : avx512_fma3p_rm<0xA7, "vfmsubadd213pd", X86Fmsubadd,
v8f64_info>,
EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
defm VFNMADD213PDZ : avx512_fma3p_rm<0xAC, "vfnmadd213pd", X86Fnmadd,
v8f64_info>,
EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
defm VFNMSUB213PDZ : avx512_fma3p_rm<0xAE, "vfnmsub213pd", X86Fnmsub,
v8f64_info>,
EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
defm VFMADDPDZ : avx512_fma3p_forms<0xA8, "vfmadd",
v8f64_info, X86Fmadd>, VEX_W;
defm VFMSUBPDZ : avx512_fma3p_forms<0xAA, "vfmsub",
v8f64_info, X86Fmsub>, VEX_W;
defm VFMADDSUBPDZ : avx512_fma3p_forms<0xA6, "vfmaddsub",
v8f64_info, X86Fmaddsub>, VEX_W;
defm VFMSUBADDPDZ : avx512_fma3p_forms<0xA7, "vfmsubadd",
v8f64_info, X86Fmsubadd>, VEX_W;
defm VFNMADDPDZ : avx512_fma3p_forms<0xAC, "vfnmadd",
v8f64_info, X86Fnmadd>, VEX_W;
defm VFNMSUBPDZ : avx512_fma3p_forms<0xAE, "vfnmsub",
v8f64_info, X86Fnmsub>, VEX_W;
}
let Constraints = "$src1 = $dst" in {