From 989621f1f8356c977d7578252422de1b65d24587 Mon Sep 17 00:00:00 2001 From: Kalle Raiskila Date: Fri, 2 Sep 2011 10:05:01 +0000 Subject: [PATCH] Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139004 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/CellSPU/SPUInstrInfo.td | 4 ++-- test/CodeGen/CellSPU/or_ops.ll | 13 ++++++++++++- 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/lib/Target/CellSPU/SPUInstrInfo.td b/lib/Target/CellSPU/SPUInstrInfo.td index e103c9b6a5a..aa6d02ce3ce 100644 --- a/lib/Target/CellSPU/SPUInstrInfo.td +++ b/lib/Target/CellSPU/SPUInstrInfo.td @@ -1594,8 +1594,8 @@ multiclass BitwiseOrImm { def v4i32: ORIVecInst; - def r32: ORIInst<(outs R32C:$rT), (ins R32C:$rA, u10imm_i32:$val), - [(set R32C:$rT, (or R32C:$rA, i32ImmUns10:$val))]>; + def r32: ORIInst<(outs R32C:$rT), (ins R32C:$rA, s10imm_i32:$val), + [(set R32C:$rT, (or R32C:$rA, i32ImmSExt10:$val))]>; // i16i32: hacked version of the ori instruction to extend 16-bit quantities // to 32-bit quantities. used exclusively to match "anyext" conversions (vide diff --git a/test/CodeGen/CellSPU/or_ops.ll b/test/CodeGen/CellSPU/or_ops.ll index 46349b9f51d..4f1febbad79 100644 --- a/test/CodeGen/CellSPU/or_ops.ll +++ b/test/CodeGen/CellSPU/or_ops.ll @@ -1,9 +1,11 @@ ; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep and %t1.s | count 2 ; RUN: grep orc %t1.s | count 85 -; RUN: grep ori %t1.s | count 30 +; RUN: grep ori %t1.s | count 34 ; RUN: grep orhi %t1.s | count 30 ; RUN: grep orbi %t1.s | count 15 +; RUN: FileCheck %s < %t1.s + target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" @@ -210,6 +212,15 @@ define signext i32 @ori_i32(i32 signext %in) { ret i32 %tmp38 } +define i32 @ori_i32_600(i32 %in) { + ;600 does not fit into 'ori' immediate field + ;CHECK: ori_i32_600 + ;CHECK: il + ;CHECK: ori + %tmp = or i32 %in, 600 + ret i32 %tmp +} + ; ORHI instruction generation (i16 data type): define <8 x i16> @orhi_v8i16_1(<8 x i16> %in) { %tmp2 = or <8 x i16> %in, < i16 511, i16 511, i16 511, i16 511,