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https://github.com/c64scene-ar/llvm-6502.git
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Needed old conditions as well as new in skipToNextVal()!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -85,7 +85,8 @@ private:
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int64_t immedVal; // constant value for an explicit constant
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int64_t immedVal; // constant value for an explicit constant
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};
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};
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bool isDef; // is this a defition for the value
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// made public for faster access
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public:
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public:
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/*ctor*/ MachineOperand ();
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/*ctor*/ MachineOperand ();
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@@ -97,27 +98,28 @@ public:
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// Accessor methods. Caller is responsible for checking the
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// Accessor methods. Caller is responsible for checking the
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// operand type before invoking the corresponding accessor.
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// operand type before invoking the corresponding accessor.
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//
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//
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MachineOperandType getOperandType () const {
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inline MachineOperandType getOperandType () const {
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return opType;
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return opType;
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}
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}
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Value* getVRegValue () const {
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inline Value* getVRegValue () const {
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assert(opType == MO_VirtualRegister || opType == MO_CCRegister);
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assert(opType == MO_VirtualRegister || opType == MO_CCRegister);
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return value;
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return value;
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}
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}
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unsigned int getMachineRegNum() const {
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inline unsigned int getMachineRegNum() const {
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assert(opType == MO_MachineRegister);
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assert(opType == MO_MachineRegister);
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return regNum;
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return regNum;
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}
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}
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int64_t getImmedValue () const {
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inline int64_t getImmedValue () const {
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assert(opType >= MO_SignExtendedImmed || opType <= MO_PCRelativeDisp);
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assert(opType >= MO_SignExtendedImmed || opType <= MO_PCRelativeDisp);
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return immedVal;
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return immedVal;
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}
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}
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inline bool opIsDef () const {
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return isDef;
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}
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bool isDef; // is this a defition for the value
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// made public for faster access
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public:
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public:
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friend ostream& operator<<(ostream& os, const MachineOperand& mop);
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friend ostream& operator<<(ostream& os, const MachineOperand& mop);
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private:
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private:
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// These functions are provided so that a vector of operands can be
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// These functions are provided so that a vector of operands can be
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@@ -131,6 +133,8 @@ private:
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void InitializeReg (unsigned int regNum);
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void InitializeReg (unsigned int regNum);
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friend class MachineInstr;
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friend class MachineInstr;
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friend class MachineInstr::val_op_const_iterator;
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friend class MachineInstr::val_op_iterator;
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};
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};
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@@ -290,10 +294,12 @@ private:
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unsigned int i;
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unsigned int i;
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int resultPos;
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int resultPos;
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_MI*& minstr;
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_MI*& minstr;
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inline void skipToNextVal() {
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inline void skipToNextVal() {
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while (i < minstr->getNumOperands()
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while (i < minstr->getNumOperands() &&
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&& minstr->getOperand(i).getVRegValue() == NULL)
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! ((minstr->operands[i].opType == MachineOperand::MO_VirtualRegister
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|| minstr->operands[i].opType == MachineOperand::MO_CCRegister)
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&& minstr->operands[i].value != NULL))
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++i;
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++i;
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}
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}
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@@ -308,7 +314,7 @@ public:
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inline _V* operator*() const { return minstr->getOperand(i).getVRegValue();}
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inline _V* operator*() const { return minstr->getOperand(i).getVRegValue();}
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inline _V* operator->() const { return operator*(); }
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inline _V* operator->() const { return operator*(); }
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// inline bool isDef () const { return (((int) i) == resultPos); }
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// inline bool isDef () const { return (((int) i) == resultPos); }
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inline bool isDef () const { return minstr->getOperand(i).isDef; }
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inline bool isDef () const { return minstr->getOperand(i).isDef; }
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inline bool done () const { return (i == minstr->getNumOperands()); }
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inline bool done () const { return (i == minstr->getNumOperands()); }
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