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Add llvm.xcore.waitevent intrinsic. The effect of this intrinsic is to enable

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events on the thread and wait until a resource is ready to event. The vector
of the resource that is ready is returned.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126320 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Richard Osborne 2011-02-23 18:35:59 +00:00
parent c70f687dce
commit 9935bd0819
3 changed files with 31 additions and 1 deletions
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3
include/llvm/IntrinsicsXCore.td
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@ -47,4 +47,7 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.".
[NoCapture<0>]>;
def int_xcore_setv : Intrinsic<[],[llvm_anyptr_ty, llvm_ptr_ty],
[NoCapture<0>]>;
// Intrinsics for events.
def int_xcore_waitevent : Intrinsic<[llvm_ptr_ty],[], [IntrReadMem]>;
}

8
lib/Target/XCore/XCoreInstrInfo.td
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@ -895,7 +895,7 @@ def SETV_1r : _F1R<(outs), (ins GRRegs:$r),
[(int_xcore_setv GRRegs:$r, R11)]>;
// Zero operand short
// TODO waiteu, clre, ssync, freet, ldspc, stspc, ldssr, stssr, ldsed, stsed,
// TODO clre, ssync, freet, ldspc, stspc, ldssr, stssr, ldsed, stsed,
// stet, geted, getet, getkep, getksp, setkep, getid, kret, dcall, dret,
// dentsp, drestsp
@ -904,6 +904,12 @@ def GETID_0R : _F0R<(outs), (ins),
"get r11, id",
[(set R11, (int_xcore_getid))]>;
let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1,
hasSideEffects = 1 in
def WAITEU_0R : _F0R<(outs), (ins),
"waiteu",
[(brind (int_xcore_waitevent))]>;
//===----------------------------------------------------------------------===//
// Non-Instruction Patterns
//===----------------------------------------------------------------------===//

21
test/CodeGen/XCore/events.ll Normal file
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@ -0,0 +1,21 @@
; RUN: llc < %s -march=xcore | FileCheck %s
declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
declare i8* @llvm.xcore.waitevent()
define i32 @f(i8 addrspace(1)* %r) nounwind {
; CHECK: f:
entry:
call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L1))
call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L2))
%goto_addr = call i8* @llvm.xcore.waitevent()
; CHECK: waiteu
indirectbr i8* %goto_addr, [label %L1, label %L2]
L1:
br label %ret
L2:
br label %ret
ret:
%retval = phi i32 [1, %L1], [2, %L2]
ret i32 %retval
}