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[PowerPC 3/4] Little-endian adjustments for VSX vector shuffle
When performing instruction selection for ISD::VECTOR_SHUFFLE, there is special code for handling v2f64 and v2i64 using VSX instructions. This code must be adjusted for little-endian. Because the two inputs are treated as a double-wide register, we must swap their order for little endian. To get the appropriate mask elements to use with the big-endian biased XXPERMDI instruction, we must reverse their order and invert the bits. A new test is added to test the 16 possible values of the shuffle mask. It is initially disabled for reasons specified in the test. It is re-enabled by patch 4/4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223791 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Schmidt
parent
f214fe8b32
commit
9a2a305ed4
@ -1380,6 +1380,15 @@ SDNode *PPCDAGToDAGISel::Select(SDNode *N) {
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else
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DM[i] = 1;
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// For little endian, we must swap the input operands and adjust
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// the mask elements (reverse and invert them).
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if (PPCSubTarget->isLittleEndian()) {
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std::swap(Op1, Op2);
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unsigned tmp = DM[0];
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DM[0] = 1 - DM[1];
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DM[1] = 1 - tmp;
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}
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SDValue DMV = CurDAG->getTargetConstant(DM[1] | (DM[0] << 1), MVT::i32);
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if (Op1 == Op2 && DM[0] == 0 && DM[1] == 0 &&
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212
test/CodeGen/PowerPC/vsx_shuffle_le.ll
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212
test/CodeGen/PowerPC/vsx_shuffle_le.ll
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@ -0,0 +1,212 @@
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; Note: This test is disabled until VSX is enabled for LE, as otherwise
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; we don't get the correct code gen.
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; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu < %s
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; FIXME: Remove this and all above lines when VSX is enabled for LE.
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; R;UN: llc -mcpu=pwr8 -mattr=+vsx -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
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define <2 x double> @test00(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 0, i32 0>
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ret <2 x double> %v3
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; CHECK-LABEL: test00
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: xxpermdi 0, 0, 0, 2
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; CHECK: xxpermdi 34, 0, 0, 3
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}
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define <2 x double> @test01(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 0, i32 1>
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ret <2 x double> %v3
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; CHECK-LABEL: test01
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: xxpermdi 34, 0, 0, 2
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}
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define <2 x double> @test02(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 0, i32 2>
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ret <2 x double> %v3
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; CHECK-LABEL: @test02
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: lxvd2x 1, 0, 4
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; CHECK: xxpermdi 0, 0, 0, 2
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; CHECK: xxpermdi 1, 1, 1, 2
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; CHECK: xxpermdi 34, 1, 0, 3
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}
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define <2 x double> @test03(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 0, i32 3>
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ret <2 x double> %v3
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; CHECK-LABEL: @test03
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: lxvd2x 1, 0, 4
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; CHECK: xxpermdi 0, 0, 0, 2
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; CHECK: xxpermdi 1, 1, 1, 2
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; CHECK: xxpermdi 34, 1, 0, 1
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}
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define <2 x double> @test10(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 1, i32 0>
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ret <2 x double> %v3
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; CHECK-LABEL: @test10
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: xxpermdi 0, 0, 0, 2
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; CHECK: xxpermdi 34, 0, 0, 2
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}
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define <2 x double> @test11(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 1, i32 1>
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ret <2 x double> %v3
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; CHECK-LABEL: @test11
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: xxpermdi 0, 0, 0, 2
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; CHECK: xxpermdi 34, 0, 0, 0
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}
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define <2 x double> @test12(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 1, i32 2>
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ret <2 x double> %v3
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; CHECK-LABEL: @test12
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: lxvd2x 1, 0, 4
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; CHECK: xxpermdi 0, 0, 0, 2
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; CHECK: xxpermdi 1, 1, 1, 2
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; CHECK: xxpermdi 34, 1, 0, 2
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}
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define <2 x double> @test13(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 1, i32 3>
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ret <2 x double> %v3
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; CHECK-LABEL: @test13
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: lxvd2x 1, 0, 4
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; CHECK: xxpermdi 0, 0, 0, 2
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; CHECK: xxpermdi 1, 1, 1, 2
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; CHECK: xxpermdi 34, 1, 0, 0
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}
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define <2 x double> @test20(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 2, i32 0>
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ret <2 x double> %v3
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; CHECK-LABEL: @test20
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: lxvd2x 1, 0, 4
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; CHECK: xxpermdi 0, 0, 0, 2
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; CHECK: xxpermdi 1, 1, 1, 2
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; CHECK: xxpermdi 34, 0, 1, 3
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}
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define <2 x double> @test21(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 2, i32 1>
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ret <2 x double> %v3
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; CHECK-LABEL: @test21
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: lxvd2x 1, 0, 4
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; CHECK: xxpermdi 0, 0, 0, 2
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; CHECK: xxpermdi 1, 1, 1, 2
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; CHECK: xxpermdi 34, 0, 1, 1
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}
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define <2 x double> @test22(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 2, i32 2>
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ret <2 x double> %v3
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; CHECK-LABEL: @test22
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; CHECK: lxvd2x 0, 0, 4
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; CHECK: xxpermdi 0, 0, 0, 2
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; CHECK: xxpermdi 34, 0, 0, 3
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}
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define <2 x double> @test23(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 2, i32 3>
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ret <2 x double> %v3
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; CHECK-LABEL: @test23
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; CHECK: lxvd2x 0, 0, 4
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; CHECK: xxpermdi 34, 0, 0, 2
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}
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define <2 x double> @test30(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 3, i32 0>
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ret <2 x double> %v3
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; CHECK-LABEL: @test30
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: lxvd2x 1, 0, 4
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; CHECK: xxpermdi 0, 0, 0, 2
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; CHECK: xxpermdi 1, 1, 1, 2
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; CHECK: xxpermdi 34, 0, 1, 2
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}
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define <2 x double> @test31(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 3, i32 1>
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ret <2 x double> %v3
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; CHECK-LABEL: @test31
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; CHECK: lxvd2x 0, 0, 3
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; CHECK: lxvd2x 1, 0, 4
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; CHECK: xxpermdi 0, 0, 0, 2
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; CHECK: xxpermdi 1, 1, 1, 2
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; CHECK: xxpermdi 34, 0, 1, 0
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}
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define <2 x double> @test32(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 3, i32 2>
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ret <2 x double> %v3
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; CHECK-LABEL: @test32
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; CHECK: lxvd2x 0, 0, 4
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; CHECK: xxpermdi 0, 0, 0, 2
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; CHECK: xxpermdi 34, 0, 0, 2
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}
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define <2 x double> @test33(<2 x double>* %p1, <2 x double>* %p2) {
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%v1 = load <2 x double>* %p1
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%v2 = load <2 x double>* %p2
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%v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 3, i32 3>
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ret <2 x double> %v3
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; CHECK-LABEL: @test33
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; CHECK: lxvd2x 0, 0, 4
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; CHECK: xxpermdi 0, 0, 0, 2
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; CHECK: xxpermdi 34, 0, 0, 0
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}
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