[AArch64] Correctly deal with VPR stack parameter passing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210067 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jiangning Liu 2014-06-03 03:25:09 +00:00
parent 1860902c45
commit 9a2d239740
2 changed files with 18 additions and 3 deletions

View File

@ -1711,7 +1711,9 @@ SDValue AArch64TargetLowering::LowerFormalArguments(
InVals.push_back(FrameIdxN);
continue;
} if (VA.isRegLoc()) {
}
if (VA.isRegLoc()) {
// Arguments stored in registers.
EVT RegVT = VA.getLocVT();
@ -1772,25 +1774,30 @@ SDValue AArch64TargetLowering::LowerFormalArguments(
SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
SDValue ArgValue;
// For NON_EXTLOAD, generic code in getLoad assert(ValVT == MemVT)
ISD::LoadExtType ExtType = ISD::NON_EXTLOAD;
MVT MemVT = VA.getValVT();
switch (VA.getLocInfo()) {
default:
break;
case CCValAssign::SExt:
ExtType = ISD::SEXTLOAD;
MemVT = VA.getLocVT();
break;
case CCValAssign::ZExt:
ExtType = ISD::ZEXTLOAD;
MemVT = VA.getLocVT();
break;
case CCValAssign::AExt:
ExtType = ISD::EXTLOAD;
MemVT = VA.getLocVT();
break;
}
ArgValue = DAG.getExtLoad(ExtType, DL, VA.getValVT(), Chain, FIN,
MachinePointerInfo::getFixedStack(FI),
VA.getLocVT(),
false, false, false, 0);
MemVT, false, false, false, 0);
InVals.push_back(ArgValue);
}

View File

@ -101,3 +101,11 @@ define fp128 @test_fp128([8 x float] %arg0, fp128 %arg1) {
; CHECK: ldr {{q[0-9]+}}, [sp]
ret fp128 %arg1
}
; Check if VPR can be correctly pass by stack.
define <2 x double> @test_vreg_stack([8 x <2 x double>], <2 x double> %varg_stack) {
entry:
; CHECK-LABEL: test_vreg_stack:
; CHECK: ldr {{q[0-9]+}}, [sp]
ret <2 x double> %varg_stack;
}