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Add vector versions of some existing scalar transforms to aid codegen in matching psign & pblend operations to the IR produced by clang/gcc for their C idioms.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122105 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nate Begeman
2010-12-17 23:12:19 +00:00
parent 976ef86689
commit 9a3dc55202
3 changed files with 46 additions and 0 deletions
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17
lib/Transforms/InstCombine/InstCombineCasts.cpp
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@ -1020,6 +1020,23 @@ Instruction *InstCombiner::visitSExt(SExtInst &CI) {
}
}
// vector (x <s 0) ? -1 : 0 -> ashr x, 31 -> all ones if signed
if (const VectorType *VTy = dyn_cast<VectorType>(DestTy)) {
ICmpInst::Predicate Pred; Value *CmpLHS;
if (match(Src, m_ICmp(Pred, m_Value(CmpLHS), m_Zero()))) {
if (Pred == ICmpInst::ICMP_SLT && CmpLHS->getType() == DestTy) {
const Type *EltTy = VTy->getElementType();
// splat the shift constant to a cosntant vector
Constant *Sh = ConstantInt::get(EltTy, EltTy->getScalarSizeInBits()-1);
std::vector<Constant *> Elts(VTy->getNumElements(), Sh);
Constant *VSh = ConstantVector::get(Elts);
Value *In = Builder->CreateAShr(CmpLHS, VSh, CmpLHS->getName()+".lobit");
return ReplaceInstUsesWith(CI, In);
}
}
}
// If the input is a shl/ashr pair of a same constant, then this is a sign
// extension from a smaller value. If we could trust arbitrary bitwidth