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Allow bitcasts between valid types of the same size and vector

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types if the vector type is legal.

Fixes rdar://9306086


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132420 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2011-06-01 19:55:10 +00:00
parent 4abc5fea9c
commit 9aaa02a1d2
2 changed files with 16 additions and 0 deletions
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6
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
View File

@ -282,6 +282,12 @@ static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
// Vector/Vector bitcast. // Vector/Vector bitcast.
return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val); return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
} }
// Trivial bitcast if the types are the same size and the destination
// vector type is legal.
if (PartVT.getSizeInBits() == ValueVT.getSizeInBits() &&
TLI.isTypeLegal(ValueVT))
return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
assert(ValueVT.getVectorElementType() == PartVT && assert(ValueVT.getVectorElementType() == PartVT &&
ValueVT.getVectorNumElements() == 1 && ValueVT.getVectorNumElements() == 1 &&

10
test/CodeGen/ARM/inlineasm3.ll
View File

@ -23,3 +23,13 @@ entry:
%asmtmp2 = tail call i32 asm sideeffect "vmov d30, $1\0Avmov.32 $0, d30[0]\0A", "=r,w,~{d30}"(<2 x i32> undef) nounwind %asmtmp2 = tail call i32 asm sideeffect "vmov d30, $1\0Avmov.32 $0, d30[0]\0A", "=r,w,~{d30}"(<2 x i32> undef) nounwind
ret void ret void
} }
; Radar 9306086
%0 = type { <8 x i8>, <16 x i8>* }
define hidden void @conv4_8_E() nounwind {
entry:
%asmtmp31 = call %0 asm "vld1.u8 {$0}, [$1, :128]!\0A", "=w,=r,1"(<16 x i8>* undef) nounwind
unreachable
}