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Include the auto-generated bits for machine encoding.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115987 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-10-07 21:57:55 +00:00
parent 366b1e1f3f
commit 9af82ba42b
1 changed files with 20 additions and 0 deletions
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20
lib/Target/ARM/ARMMCCodeEmitter.cpp
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@ -36,6 +36,17 @@ public:
~ARMMCCodeEmitter() {} ~ARMMCCodeEmitter() {}
// getBinaryCodeForInstr - TableGen'erated function for getting the
// binary encoding for an instruction.
unsigned getBinaryCodeForInstr(const MCInst &MI);
/// getMachineOpValue - Return binary encoding of operand. If the machine
/// operand requires relocation, record the relocation and return zero.
unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO);
unsigned getMachineOpValue(const MCInst &MI, unsigned OpIdx) {
return getMachineOpValue(MI, MI.getOperand(OpIdx));
}
unsigned getNumFixupKinds() const { unsigned getNumFixupKinds() const {
assert(0 && "ARMMCCodeEmitter::getNumFixupKinds() not yet implemented."); assert(0 && "ARMMCCodeEmitter::getNumFixupKinds() not yet implemented.");
return 0; return 0;
@ -98,3 +109,12 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups) const { SmallVectorImpl<MCFixup> &Fixups) const {
assert(0 && "ARMMCCodeEmitter::EncodeInstruction() not yet implemented."); assert(0 && "ARMMCCodeEmitter::EncodeInstruction() not yet implemented.");
} }
// FIXME: These #defines shouldn't be necessary. Instead, tblgen should
// be able to generate code emitter helpers for either variant, like it
// does for the AsmWriter.
#define ARMCodeEmitter ARMMCCodeEmitter
#define MachineInstr MCInst
#include "ARMGenCodeEmitter.inc"
#undef ARMCodeEmitter
#undef MachineInstr