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Tidy up spacing in some tablegen outputs.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153937 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
2012-04-03 06:52:47 +00:00
parent 769bbfd951
commit 9b1b25f063
2 changed files with 9 additions and 11 deletions
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2
utils/TableGen/AsmWriterEmitter.cpp
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@@ -525,7 +525,7 @@ emitRegisterNameString(raw_ostream &O, StringRef AltName,
O << "\n "; O << "\n ";
O << StringTable.get(AsmNames[i]) << ", "; O << StringTable.get(AsmNames[i]) << ", ";
} }
O << " };\n" O << "\n };\n"
<< "\n"; << "\n";
} }

6
utils/TableGen/RegisterInfoEmitter.cpp
View File

@@ -578,8 +578,7 @@ RegisterInfoEmitter::runTargetHeader(raw_ostream &OS, CodeGenTarget &Target,
const std::string &TargetName = Target.getName(); const std::string &TargetName = Target.getName();
std::string ClassName = TargetName + "GenRegisterInfo"; std::string ClassName = TargetName + "GenRegisterInfo";
OS << "#include \"llvm/Target/TargetRegisterInfo.h\"\n"; OS << "#include \"llvm/Target/TargetRegisterInfo.h\"\n\n";
OS << "#include <string>\n\n";
OS << "namespace llvm {\n\n"; OS << "namespace llvm {\n\n";
@@ -813,8 +812,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
// Emit extra information about registers. // Emit extra information about registers.
const std::string &TargetName = Target.getName(); const std::string &TargetName = Target.getName();
OS << "\nstatic const TargetRegisterInfoDesc " OS << "\nstatic const TargetRegisterInfoDesc "
<< TargetName << "RegInfoDesc[] = " << TargetName << "RegInfoDesc[] = { // Extra Descriptors\n";
<< "{ // Extra Descriptors\n";
OS << " { 0, 0 },\n"; OS << " { 0, 0 },\n";
const std::vector<CodeGenRegister*> &Regs = RegBank.getRegisters(); const std::vector<CodeGenRegister*> &Regs = RegBank.getRegisters();