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R600/SI: Fix copies from SGPR to VCC

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This shows up without optimizations when vcc is required
to be used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229226 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault
2015-02-14 02:55:56 +00:00
parent 582d603f17
commit 9b6d620f89
1 changed files with 10 additions and 5 deletions
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15
lib/Target/R600/SIInstrInfo.cpp
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@@ -333,12 +333,17 @@ SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
} else if (AMDGPU::SReg_64RegClass.contains(DestReg)) { } else if (AMDGPU::SReg_64RegClass.contains(DestReg)) {
if (DestReg == AMDGPU::VCC) { if (DestReg == AMDGPU::VCC) {
// FIXME: Hack until VReg_1 removed. if (AMDGPU::SReg_64RegClass.contains(SrcReg)) {
BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), AMDGPU::VCC)
.addReg(SrcReg, getKillRegState(KillSrc));
} else {
// FIXME: Hack until VReg_1 removed.
assert(AMDGPU::VGPR_32RegClass.contains(SrcReg));
BuildMI(MBB, MI, DL, get(AMDGPU::V_CMP_NE_I32_e32), AMDGPU::VCC)
.addImm(0)
.addReg(SrcReg, getKillRegState(KillSrc));
}
assert(AMDGPU::VGPR_32RegClass.contains(SrcReg));
BuildMI(MBB, MI, DL, get(AMDGPU::V_CMP_NE_I32_e32), AMDGPU::VCC)
.addImm(0)
.addReg(SrcReg, getKillRegState(KillSrc));
return; return;
} }