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Create DebugLoc information in FastISel. Several temporary methods were

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created. Specifically, those BuildMIs which use
"DebugLoc::getUnknownLoc()". I'll remove them soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63584 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2009-02-03 00:55:04 +00:00
parent ff97d4fe81
commit 9bc96a5720
8 changed files with 111 additions and 46 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
include/llvm/CodeGen/FastISel.h
View File

@ -16,6 +16,7 @@
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/CodeGen/DebugLoc.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
namespace llvm {
@ -55,28 +56,33 @@ protected:
MachineRegisterInfo &MRI;
MachineFrameInfo &MFI;
MachineConstantPool &MCP;
DebugLoc DL;
const TargetMachine &TM;
const TargetData &TD;
const TargetInstrInfo &TII;
const TargetLowering &TLI;
public:
/// startNewBlock - Set the current block, to which generated
/// machine instructions will be appended, and clear the local
/// CSE map.
/// startNewBlock - Set the current block to which generated machine
/// instructions will be appended, and clear the local CSE map.
///
void startNewBlock(MachineBasicBlock *mbb) {
setCurrentBlock(mbb);
LocalValueMap.clear();
}
/// setCurrentBlock - Set the current block, to which generated
/// machine instructions will be appended.
/// setCurrentBlock - Set the current block to which generated machine
/// instructions will be appended.
///
void setCurrentBlock(MachineBasicBlock *mbb) {
MBB = mbb;
}
/// setCurDebugLoc - Set the current debug location information, which is used
/// when creating a machine instruction.
///
void setCurDebugLoc(DebugLoc dl) { DL = dl; }
/// SelectInstruction - Do "fast" instruction selection for the given
/// LLVM IR instruction, and append generated machine instructions to
/// the current block. Return true if selection was successful.

1
include/llvm/CodeGen/MachineFunction.h
View File

@ -286,6 +286,7 @@ public:
/// of `new MachineInstr'.
///
MachineInstr *CreateMachineInstr(const TargetInstrDesc &TID,
DebugLoc DL,
bool NoImp = false);
/// CloneMachineInstr - Create a new MachineInstr which is a copy of the

59
include/llvm/CodeGen/MachineInstrBuilder.h
View File

@ -100,16 +100,31 @@ public:
///
inline MachineInstrBuilder BuildMI(MachineFunction &MF,
const TargetInstrDesc &TID) {
return MachineInstrBuilder(MF.CreateMachineInstr(TID));
return MachineInstrBuilder(MF.CreateMachineInstr(TID,
DebugLoc::getUnknownLoc()));
}
inline MachineInstrBuilder BuildMI(MachineFunction &MF,
DebugLoc DL,
const TargetInstrDesc &TID) {
return MachineInstrBuilder(MF.CreateMachineInstr(TID, DL));
}
/// BuildMI - This version of the builder sets up the first operand as a
/// destination virtual register.
///
inline MachineInstrBuilder BuildMI(MachineFunction &MF,
const TargetInstrDesc &TID,
unsigned DestReg) {
return MachineInstrBuilder(MF.CreateMachineInstr(TID)).addReg(DestReg, true);
inline MachineInstrBuilder BuildMI(MachineFunction &MF,
const TargetInstrDesc &TID,
unsigned DestReg) {
return MachineInstrBuilder(MF.CreateMachineInstr(TID,
DebugLoc::getUnknownLoc()))
.addReg(DestReg, true);
}
inline MachineInstrBuilder BuildMI(MachineFunction &MF,
DebugLoc DL,
const TargetInstrDesc &TID,
unsigned DestReg) {
return MachineInstrBuilder(MF.CreateMachineInstr(TID, DL))
.addReg(DestReg, true);
}
/// BuildMI - This version of the builder inserts the newly-built
@ -120,7 +135,17 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I,
const TargetInstrDesc &TID,
unsigned DestReg) {
MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID);
MachineInstr *MI =
BB.getParent()->CreateMachineInstr(TID, DebugLoc::getUnknownLoc());
BB.insert(I, MI);
return MachineInstrBuilder(MI).addReg(DestReg, true);
}
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I,
DebugLoc DL,
const TargetInstrDesc &TID,
unsigned DestReg) {
MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID, DL);
BB.insert(I, MI);
return MachineInstrBuilder(MI).addReg(DestReg, true);
}
@ -132,7 +157,16 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I,
const TargetInstrDesc &TID) {
MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID);
MachineInstr *MI =
BB.getParent()->CreateMachineInstr(TID, DebugLoc::getUnknownLoc());
BB.insert(I, MI);
return MachineInstrBuilder(MI);
}
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I,
DebugLoc DL,
const TargetInstrDesc &TID) {
MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID, DL);
BB.insert(I, MI);
return MachineInstrBuilder(MI);
}
@ -145,6 +179,11 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
const TargetInstrDesc &TID) {
return BuildMI(*BB, BB->end(), TID);
}
inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
DebugLoc DL,
const TargetInstrDesc &TID) {
return BuildMI(*BB, BB->end(), DL, TID);
}
/// BuildMI - This version of the builder inserts the newly-built
/// instruction at the end of the given MachineBasicBlock, and sets up the first
@ -155,6 +194,12 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
unsigned DestReg) {
return BuildMI(*BB, BB->end(), TID, DestReg);
}
inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
DebugLoc DL,
const TargetInstrDesc &TID,
unsigned DestReg) {
return BuildMI(*BB, BB->end(), DL, TID, DestReg);
}
} // End llvm namespace

5
lib/CodeGen/MachineFunction.cpp
View File

@ -192,9 +192,10 @@ void MachineFunction::RenumberBlocks(MachineBasicBlock *MBB) {
/// of `new MachineInstr'.
///
MachineInstr *
MachineFunction::CreateMachineInstr(const TargetInstrDesc &TID, bool NoImp) {
MachineFunction::CreateMachineInstr(const TargetInstrDesc &TID,
DebugLoc DL, bool NoImp) {
return new (InstructionRecycler.Allocate<MachineInstr>(Allocator))
MachineInstr(TID, NoImp);
MachineInstr(TID, DL, NoImp);
}
/// CloneMachineInstr - Create a new MachineInstr which is a copy of the

57
lib/CodeGen/SelectionDAG/FastISel.cpp
View File

@ -114,7 +114,7 @@ unsigned FastISel::getRegForValue(Value *V) {
Reg = LocalValueMap[CE];
} else if (isa<UndefValue>(V)) {
Reg = createResultReg(TLI.getRegClassFor(VT));
BuildMI(MBB, TII.get(TargetInstrInfo::IMPLICIT_DEF), Reg);
BuildMI(MBB, DL, TII.get(TargetInstrInfo::IMPLICIT_DEF), Reg);
}
// If target-independent code couldn't handle the value, give target-specific
@ -324,8 +324,10 @@ bool FastISel::SelectCall(User *I) {
unsigned Line = SPI->getLine();
unsigned Col = SPI->getColumn();
unsigned ID = DW->RecordSourceLine(Line, Col, SrcFile);
unsigned Idx = MF.getOrCreateDebugLocID(SrcFile, Line, Col);
setCurDebugLoc(DebugLoc::get(Idx));
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
BuildMI(MBB, II).addImm(ID);
BuildMI(MBB, DL, II).addImm(ID);
}
return true;
}
@ -335,7 +337,7 @@ bool FastISel::SelectCall(User *I) {
unsigned ID =
DW->RecordRegionStart(cast<GlobalVariable>(RSI->getContext()));
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
BuildMI(MBB, II).addImm(ID);
BuildMI(MBB, DL, II).addImm(ID);
}
return true;
}
@ -345,7 +347,7 @@ bool FastISel::SelectCall(User *I) {
unsigned ID =
DW->RecordRegionEnd(cast<GlobalVariable>(REI->getContext()));
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
BuildMI(MBB, II).addImm(ID);
BuildMI(MBB, DL, II).addImm(ID);
}
return true;
}
@ -353,23 +355,28 @@ bool FastISel::SelectCall(User *I) {
if (!DW) return true;
DbgFuncStartInst *FSI = cast<DbgFuncStartInst>(I);
Value *SP = FSI->getSubprogram();
if (DW->ValidDebugInfo(SP)) {
// llvm.dbg.func.start implicitly defines a dbg_stoppoint which is
// what (most?) gdb expects.
// llvm.dbg.func.start implicitly defines a dbg_stoppoint which is what
// (most?) gdb expects.
DISubprogram Subprogram(cast<GlobalVariable>(SP));
DICompileUnit CompileUnit = Subprogram.getCompileUnit();
unsigned SrcFile = DW->RecordSource(CompileUnit.getDirectory(),
CompileUnit.getFilename());
// Record the source line but does not create a label for the normal
// function start. It will be emitted at asm emission time. However,
// create a label if this is a beginning of inlined function.
unsigned LabelID =
DW->RecordSourceLine(Subprogram.getLineNumber(), 0, SrcFile);
unsigned Line = Subprogram.getLineNumber();
unsigned LabelID = DW->RecordSourceLine(Line, 0, SrcFile);
setCurDebugLoc(DebugLoc::get(MF.getOrCreateDebugLocID(SrcFile, Line, 0)));
if (DW->getRecordSourceLineCount() != 1) {
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
BuildMI(MBB, II).addImm(LabelID);
BuildMI(MBB, DL, II).addImm(LabelID);
}
}
return true;
}
case Intrinsic::dbg_declare: {
@ -393,7 +400,7 @@ bool FastISel::SelectCall(User *I) {
// Build the DECLARE instruction.
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DECLARE);
BuildMI(MBB, II).addFrameIndex(FI).addGlobalAddress(GV);
BuildMI(MBB, DL, II).addFrameIndex(FI).addGlobalAddress(GV);
}
return true;
}
@ -830,7 +837,7 @@ unsigned FastISel::FastEmitInst_(unsigned MachineInstOpcode,
unsigned ResultReg = createResultReg(RC);
const TargetInstrDesc &II = TII.get(MachineInstOpcode);
BuildMI(MBB, II, ResultReg);
BuildMI(MBB, DL, II, ResultReg);
return ResultReg;
}
@ -841,9 +848,9 @@ unsigned FastISel::FastEmitInst_r(unsigned MachineInstOpcode,
const TargetInstrDesc &II = TII.get(MachineInstOpcode);
if (II.getNumDefs() >= 1)
BuildMI(MBB, II, ResultReg).addReg(Op0);
BuildMI(MBB, DL, II, ResultReg).addReg(Op0);
else {
BuildMI(MBB, II).addReg(Op0);
BuildMI(MBB, DL, II).addReg(Op0);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
II.ImplicitDefs[0], RC, RC);
if (!InsertedCopy)
@ -860,9 +867,9 @@ unsigned FastISel::FastEmitInst_rr(unsigned MachineInstOpcode,
const TargetInstrDesc &II = TII.get(MachineInstOpcode);
if (II.getNumDefs() >= 1)
BuildMI(MBB, II, ResultReg).addReg(Op0).addReg(Op1);
BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addReg(Op1);
else {
BuildMI(MBB, II).addReg(Op0).addReg(Op1);
BuildMI(MBB, DL, II).addReg(Op0).addReg(Op1);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
II.ImplicitDefs[0], RC, RC);
if (!InsertedCopy)
@ -878,9 +885,9 @@ unsigned FastISel::FastEmitInst_ri(unsigned MachineInstOpcode,
const TargetInstrDesc &II = TII.get(MachineInstOpcode);
if (II.getNumDefs() >= 1)
BuildMI(MBB, II, ResultReg).addReg(Op0).addImm(Imm);
BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addImm(Imm);
else {
BuildMI(MBB, II).addReg(Op0).addImm(Imm);
BuildMI(MBB, DL, II).addReg(Op0).addImm(Imm);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
II.ImplicitDefs[0], RC, RC);
if (!InsertedCopy)
@ -896,9 +903,9 @@ unsigned FastISel::FastEmitInst_rf(unsigned MachineInstOpcode,
const TargetInstrDesc &II = TII.get(MachineInstOpcode);
if (II.getNumDefs() >= 1)
BuildMI(MBB, II, ResultReg).addReg(Op0).addFPImm(FPImm);
BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addFPImm(FPImm);
else {
BuildMI(MBB, II).addReg(Op0).addFPImm(FPImm);
BuildMI(MBB, DL, II).addReg(Op0).addFPImm(FPImm);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
II.ImplicitDefs[0], RC, RC);
if (!InsertedCopy)
@ -914,9 +921,9 @@ unsigned FastISel::FastEmitInst_rri(unsigned MachineInstOpcode,
const TargetInstrDesc &II = TII.get(MachineInstOpcode);
if (II.getNumDefs() >= 1)
BuildMI(MBB, II, ResultReg).addReg(Op0).addReg(Op1).addImm(Imm);
BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addReg(Op1).addImm(Imm);
else {
BuildMI(MBB, II).addReg(Op0).addReg(Op1).addImm(Imm);
BuildMI(MBB, DL, II).addReg(Op0).addReg(Op1).addImm(Imm);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
II.ImplicitDefs[0], RC, RC);
if (!InsertedCopy)
@ -932,9 +939,9 @@ unsigned FastISel::FastEmitInst_i(unsigned MachineInstOpcode,
const TargetInstrDesc &II = TII.get(MachineInstOpcode);
if (II.getNumDefs() >= 1)
BuildMI(MBB, II, ResultReg).addImm(Imm);
BuildMI(MBB, DL, II, ResultReg).addImm(Imm);
else {
BuildMI(MBB, II).addImm(Imm);
BuildMI(MBB, DL, II).addImm(Imm);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
II.ImplicitDefs[0], RC, RC);
if (!InsertedCopy)
@ -951,9 +958,9 @@ unsigned FastISel::FastEmitInst_extractsubreg(MVT::SimpleValueType RetVT,
const TargetInstrDesc &II = TII.get(TargetInstrInfo::EXTRACT_SUBREG);
if (II.getNumDefs() >= 1)
BuildMI(MBB, II, ResultReg).addReg(Op0).addImm(Idx);
BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addImm(Idx);
else {
BuildMI(MBB, II).addReg(Op0).addImm(Idx);
BuildMI(MBB, DL, II).addReg(Op0).addImm(Idx);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
II.ImplicitDefs[0], RC, RC);
if (!InsertedCopy)

6
lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
View File

@ -3884,14 +3884,16 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
DICompileUnit CompileUnit = Subprogram.getCompileUnit();
unsigned SrcFile = DW->RecordSource(CompileUnit.getDirectory(),
CompileUnit.getFilename());
// Record the source line but does not create a label for the normal
// function start. It will be emitted at asm emission time. However,
// create a label if this is a beginning of inlined function.
unsigned Line = Subprogram.getLineNumber();
unsigned LabelID =
DW->RecordSourceLine(Line, 0, SrcFile);
unsigned LabelID = DW->RecordSourceLine(Line, 0, SrcFile);
if (DW->getRecordSourceLineCount() != 1)
DAG.setRoot(DAG.getLabel(ISD::DBG_LABEL, getRoot(), LabelID));
setCurDebugLoc(DebugLoc::get(DAG.getMachineFunction().
getOrCreateDebugLocID(SrcFile, Line, 0)));
}

2
lib/Target/ARM/ARMInstrInfo.cpp
View File

@ -649,7 +649,7 @@ bool ARMInstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
return false;
bool isVarArg = AFI->getVarArgsRegSaveSize() > 0;
MachineInstr *PopMI = MF.CreateMachineInstr(get(ARM::tPOP));
MachineInstr *PopMI = MF.CreateMachineInstr(get(ARM::tPOP),MI->getDebugLoc());
MBB.insert(MI, PopMI);
for (unsigned i = CSI.size(); i != 0; --i) {
unsigned Reg = CSI[i-1].getReg();

11
lib/Target/X86/X86InstrInfo.cpp
View File

@ -1938,9 +1938,11 @@ bool X86InstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
static MachineInstr *FuseTwoAddrInst(MachineFunction &MF, unsigned Opcode,
const SmallVectorImpl<MachineOperand> &MOs,
MachineInstr *MI, const TargetInstrInfo &TII) {
MachineInstr *MI,
const TargetInstrInfo &TII) {
// Create the base instruction with the memory operand as the first part.
MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), true);
MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode),
MI->getDebugLoc(), true);
MachineInstrBuilder MIB(NewMI);
unsigned NumAddrOps = MOs.size();
for (unsigned i = 0; i != NumAddrOps; ++i)
@ -1965,7 +1967,8 @@ static MachineInstr *FuseInst(MachineFunction &MF,
unsigned Opcode, unsigned OpNo,
const SmallVectorImpl<MachineOperand> &MOs,
MachineInstr *MI, const TargetInstrInfo &TII) {
MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), true);
MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode),
MI->getDebugLoc(), true);
MachineInstrBuilder MIB(NewMI);
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
@ -2298,7 +2301,7 @@ bool X86InstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
}
// Emit the data processing instruction.
MachineInstr *DataMI = MF.CreateMachineInstr(TID, true);
MachineInstr *DataMI = MF.CreateMachineInstr(TID, MI->getDebugLoc(), true);
MachineInstrBuilder MIB(DataMI);
if (FoldedStore)