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	Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister. This time
make sure to allocate enough space in the std::vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108449 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
		| @@ -41,11 +41,11 @@ DebugMod("agg-antidep-debugmod", | |||||||
|  |  | ||||||
| AggressiveAntiDepState::AggressiveAntiDepState(const unsigned TargetRegs, | AggressiveAntiDepState::AggressiveAntiDepState(const unsigned TargetRegs, | ||||||
|                                                MachineBasicBlock *BB) : |                                                MachineBasicBlock *BB) : | ||||||
|   NumTargetRegs(TargetRegs), GroupNodes(TargetRegs, 0) { |   NumTargetRegs(TargetRegs), GroupNodes(TargetRegs, 0), | ||||||
|   GroupNodeIndices.reserve(TargetRegs); |   GroupNodeIndices(TargetRegs, 0), | ||||||
|   KillIndices.reserve(TargetRegs); |   KillIndices(TargetRegs, 0), | ||||||
|   DefIndices.reserve(TargetRegs); |   DefIndices(TargetRegs, 0) | ||||||
|  | { | ||||||
|   const unsigned BBSize = BB->size(); |   const unsigned BBSize = BB->size(); | ||||||
|   for (unsigned i = 0; i < NumTargetRegs; ++i) { |   for (unsigned i = 0; i < NumTargetRegs; ++i) { | ||||||
|     // Initialize all registers to be in their own group. Initially we |     // Initialize all registers to be in their own group. Initially we | ||||||
|   | |||||||
| @@ -32,21 +32,23 @@ CriticalAntiDepBreaker(MachineFunction& MFi) : | |||||||
|   MRI(MF.getRegInfo()), |   MRI(MF.getRegInfo()), | ||||||
|   TII(MF.getTarget().getInstrInfo()), |   TII(MF.getTarget().getInstrInfo()), | ||||||
|   TRI(MF.getTarget().getRegisterInfo()), |   TRI(MF.getTarget().getRegisterInfo()), | ||||||
|   AllocatableSet(TRI->getAllocatableSet(MF)) |   AllocatableSet(TRI->getAllocatableSet(MF)), | ||||||
| { |   Classes(TRI->getNumRegs(), static_cast<const TargetRegisterClass *>(0)), | ||||||
| } |   KillIndices(TRI->getNumRegs(), 0), | ||||||
|  |   DefIndices(TRI->getNumRegs(), 0) {} | ||||||
|  |  | ||||||
| CriticalAntiDepBreaker::~CriticalAntiDepBreaker() { | CriticalAntiDepBreaker::~CriticalAntiDepBreaker() { | ||||||
| } | } | ||||||
|  |  | ||||||
| void CriticalAntiDepBreaker::StartBlock(MachineBasicBlock *BB) { | void CriticalAntiDepBreaker::StartBlock(MachineBasicBlock *BB) { | ||||||
|   // Clear out the register class data. |   Classes.clear(); | ||||||
|   std::fill(Classes, array_endof(Classes), |  | ||||||
|             static_cast<const TargetRegisterClass *>(0)); |  | ||||||
|  |  | ||||||
|   // Initialize the indices to indicate that no registers are live. |  | ||||||
|   const unsigned BBSize = BB->size(); |   const unsigned BBSize = BB->size(); | ||||||
|   for (unsigned i = 0; i < TRI->getNumRegs(); ++i) { |   for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) { | ||||||
|  |     // Clear out the register class data. | ||||||
|  |     Classes[i] = static_cast<const TargetRegisterClass *>(0); | ||||||
|  |  | ||||||
|  |     // Initialize the indices to indicate that no registers are live. | ||||||
|     KillIndices[i] = ~0u; |     KillIndices[i] = ~0u; | ||||||
|     DefIndices[i] = BBSize; |     DefIndices[i] = BBSize; | ||||||
|   } |   } | ||||||
| @@ -65,6 +67,7 @@ void CriticalAntiDepBreaker::StartBlock(MachineBasicBlock *BB) { | |||||||
|       Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); |       Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); | ||||||
|       KillIndices[Reg] = BB->size(); |       KillIndices[Reg] = BB->size(); | ||||||
|       DefIndices[Reg] = ~0u; |       DefIndices[Reg] = ~0u; | ||||||
|  |  | ||||||
|       // Repeat, for all aliases. |       // Repeat, for all aliases. | ||||||
|       for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) { |       for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) { | ||||||
|         unsigned AliasReg = *Alias; |         unsigned AliasReg = *Alias; | ||||||
| @@ -86,6 +89,7 @@ void CriticalAntiDepBreaker::StartBlock(MachineBasicBlock *BB) { | |||||||
|       Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); |       Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); | ||||||
|       KillIndices[Reg] = BB->size(); |       KillIndices[Reg] = BB->size(); | ||||||
|       DefIndices[Reg] = ~0u; |       DefIndices[Reg] = ~0u; | ||||||
|  |  | ||||||
|       // Repeat, for all aliases. |       // Repeat, for all aliases. | ||||||
|       for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) { |       for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) { | ||||||
|         unsigned AliasReg = *Alias; |         unsigned AliasReg = *Alias; | ||||||
| @@ -106,6 +110,7 @@ void CriticalAntiDepBreaker::StartBlock(MachineBasicBlock *BB) { | |||||||
|     Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); |     Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); | ||||||
|     KillIndices[Reg] = BB->size(); |     KillIndices[Reg] = BB->size(); | ||||||
|     DefIndices[Reg] = ~0u; |     DefIndices[Reg] = ~0u; | ||||||
|  |  | ||||||
|     // Repeat, for all aliases. |     // Repeat, for all aliases. | ||||||
|     for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) { |     for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) { | ||||||
|       unsigned AliasReg = *Alias; |       unsigned AliasReg = *Alias; | ||||||
| @@ -134,8 +139,10 @@ void CriticalAntiDepBreaker::Observe(MachineInstr *MI, unsigned Count, | |||||||
|   for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) |   for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) | ||||||
|     if (DefIndices[Reg] < InsertPosIndex && DefIndices[Reg] >= Count) { |     if (DefIndices[Reg] < InsertPosIndex && DefIndices[Reg] >= Count) { | ||||||
|       assert(KillIndices[Reg] == ~0u && "Clobbered register is live!"); |       assert(KillIndices[Reg] == ~0u && "Clobbered register is live!"); | ||||||
|  |  | ||||||
|       // Mark this register to be non-renamable. |       // Mark this register to be non-renamable. | ||||||
|       Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); |       Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); | ||||||
|  |  | ||||||
|       // Move the def index to the end of the previous region, to reflect |       // Move the def index to the end of the previous region, to reflect | ||||||
|       // that the def could theoretically have been scheduled at the end. |       // that the def could theoretically have been scheduled at the end. | ||||||
|       DefIndices[Reg] = InsertPosIndex; |       DefIndices[Reg] = InsertPosIndex; | ||||||
| @@ -433,7 +440,7 @@ BreakAntiDependencies(const std::vector<SUnit>& SUnits, | |||||||
|   // fix that remaining critical edge too. This is a little more involved, |   // fix that remaining critical edge too. This is a little more involved, | ||||||
|   // because unlike the most recent register, less recent registers should |   // because unlike the most recent register, less recent registers should | ||||||
|   // still be considered, though only if no other registers are available. |   // still be considered, though only if no other registers are available. | ||||||
|   unsigned LastNewReg[TargetRegisterInfo::FirstVirtualRegister] = {}; |   std::vector<unsigned> LastNewReg(TRI->getNumRegs(), 0); | ||||||
|  |  | ||||||
|   // Attempt to break anti-dependence edges on the critical path. Walk the |   // Attempt to break anti-dependence edges on the critical path. Walk the | ||||||
|   // instructions from the bottom up, tracking information about liveness |   // instructions from the bottom up, tracking information about liveness | ||||||
|   | |||||||
| @@ -46,19 +46,18 @@ class TargetRegisterInfo; | |||||||
|     /// corresponding value is null. If the register is live but used in |     /// corresponding value is null. If the register is live but used in | ||||||
|     /// multiple register classes, the corresponding value is -1 casted to a |     /// multiple register classes, the corresponding value is -1 casted to a | ||||||
|     /// pointer. |     /// pointer. | ||||||
|     const TargetRegisterClass * |     std::vector<const TargetRegisterClass*> Classes; | ||||||
|       Classes[TargetRegisterInfo::FirstVirtualRegister]; |  | ||||||
|  |  | ||||||
|     /// RegRegs - Map registers to all their references within a live range. |     /// RegRegs - Map registers to all their references within a live range. | ||||||
|     std::multimap<unsigned, MachineOperand *> RegRefs; |     std::multimap<unsigned, MachineOperand *> RegRefs; | ||||||
|  |  | ||||||
|     /// KillIndices - The index of the most recent kill (proceding bottom-up), |     /// KillIndices - The index of the most recent kill (proceding bottom-up), | ||||||
|     /// or ~0u if the register is not live. |     /// or ~0u if the register is not live. | ||||||
|     unsigned KillIndices[TargetRegisterInfo::FirstVirtualRegister]; |     std::vector<unsigned> KillIndices; | ||||||
|  |  | ||||||
|     /// DefIndices - The index of the most recent complete def (proceding bottom |     /// DefIndices - The index of the most recent complete def (proceding bottom | ||||||
|     /// up), or ~0u if the register is live. |     /// up), or ~0u if the register is live. | ||||||
|     unsigned DefIndices[TargetRegisterInfo::FirstVirtualRegister]; |     std::vector<unsigned> DefIndices; | ||||||
|  |  | ||||||
|     /// KeepRegs - A set of registers which are live and cannot be changed to |     /// KeepRegs - A set of registers which are live and cannot be changed to | ||||||
|     /// break anti-dependencies. |     /// break anti-dependencies. | ||||||
|   | |||||||
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