diff --git a/lib/Target/Hexagon/HexagonInstrInfo.td b/lib/Target/Hexagon/HexagonInstrInfo.td index d73adc66b5c..7ce65f345ca 100644 --- a/lib/Target/Hexagon/HexagonInstrInfo.td +++ b/lib/Target/Hexagon/HexagonInstrInfo.td @@ -3220,6 +3220,13 @@ class T_S2op_2 RegTyBits, RegisterClass RCOut, let Inst{7-5} = MinOp; let Inst{4-0} = dst; } + +class T_S2op_2_di MajOp, bits<3> MinOp> + : T_S2op_2 ; + +let hasNewValue = 1 in +class T_S2op_2_id MajOp, bits<3> MinOp> + : T_S2op_2 ; let hasNewValue = 1 in class T_S2op_2_ii MajOp, bits<3> MinOp, diff --git a/lib/Target/Hexagon/HexagonInstrInfoV4.td b/lib/Target/Hexagon/HexagonInstrInfoV4.td index 07892edc3ea..6892b5c9bf8 100644 --- a/lib/Target/Hexagon/HexagonInstrInfoV4.td +++ b/lib/Target/Hexagon/HexagonInstrInfoV4.td @@ -1747,6 +1747,20 @@ def M4_xor_xacc let Inst{12-8} = Rtt; let Inst{4-0} = Rxx; } + +// Split bitfield +let isCodeGenOnly = 0 in +def A4_bitspliti : T_S2op_2_di <"bitsplit", 0b110, 0b100>; + +// Arithmetic/Convergent round +let isCodeGenOnly = 0 in +def A4_cround_ri : T_S2op_2_ii <"cround", 0b111, 0b000>; + +let isCodeGenOnly = 0 in +def A4_round_ri : T_S2op_2_ii <"round", 0b111, 0b100>; + +let Defs = [USR_OVF], isCodeGenOnly = 0 in +def A4_round_ri_sat : T_S2op_2_ii <"round", 0b111, 0b110, 1>; // Add and accumulate. // Rd=add(Rs,add(Ru,#s6)) diff --git a/test/MC/Disassembler/Hexagon/xtype_alu.txt b/test/MC/Disassembler/Hexagon/xtype_alu.txt index ec9944bd926..d614e9ca83b 100644 --- a/test/MC/Disassembler/Hexagon/xtype_alu.txt +++ b/test/MC/Disassembler/Hexagon/xtype_alu.txt @@ -86,6 +86,12 @@ # CHECK: r17:16 = neg(r21:20) 0xd1 0xc0 0x95 0x8c # CHECK: r17 = neg(r21):sat +0x11 0xdf 0xf5 0x8c +# CHECK: r17 = cround(r21, #31) +0x91 0xdf 0xf5 0x8c +# CHECK: r17 = round(r21, #31) +0xd1 0xdf 0xf5 0x8c +# CHECK: r17 = round(r21, #31):sat 0x71 0xd5 0x1f 0xef # CHECK: r17 += sub(r21, r31) 0x11 0xd5 0x3f 0xd5 diff --git a/test/MC/Disassembler/Hexagon/xtype_bit.txt b/test/MC/Disassembler/Hexagon/xtype_bit.txt index 601b3e19963..ac670c02bb0 100644 --- a/test/MC/Disassembler/Hexagon/xtype_bit.txt +++ b/test/MC/Disassembler/Hexagon/xtype_bit.txt @@ -64,6 +64,8 @@ # CHECK: r17 = clrbit(r21, r31) 0x91 0xdf 0x95 0xc6 # CHECK: r17 = togglebit(r21, r31) +0x90 0xdf 0xd5 0x88 +# CHECK: r17:16 = bitsplit(r21, #31) 0xf1 0xcd 0x15 0x87 # CHECK: r17 = tableidxb(r21, #7, #13):raw 0xf1 0xcd 0x55 0x87