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Break the spill placement algorithm into three parts: prepare, addConstraints, and finish.
This will allow us to abort the algorithm early if it is determined to be futile. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129020 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -770,7 +770,10 @@ unsigned RAGreedy::tryRegionSplit(LiveInterval &VirtReg, AllocationOrder &Order,
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continue;
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continue;
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}
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}
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SpillPlacer->placeSpills(SplitConstraints, LiveBundles);
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SpillPlacer->prepare(LiveBundles);
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SpillPlacer->addConstraints(SplitConstraints);
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SpillPlacer->finish();
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// No live bundles, defer to splitSingleBlocks().
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// No live bundles, defer to splitSingleBlocks().
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if (!LiveBundles.any()) {
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if (!LiveBundles.any()) {
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DEBUG(dbgs() << " no bundles.\n");
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DEBUG(dbgs() << " no bundles.\n");
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@ -203,11 +203,10 @@ void SpillPlacement::activate(unsigned n) {
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}
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}
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/// prepareNodes - Compute node biases and weights from a set of constraints.
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/// addConstraints - Compute node biases and weights from a set of constraints.
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/// Set a bit in NodeMask for each active node.
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/// Set a bit in NodeMask for each active node.
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void SpillPlacement::
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void SpillPlacement::addConstraints(ArrayRef<BlockConstraint> LiveBlocks) {
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prepareNodes(const SmallVectorImpl<BlockConstraint> &LiveBlocks) {
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for (ArrayRef<BlockConstraint>::iterator I = LiveBlocks.begin(),
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for (SmallVectorImpl<BlockConstraint>::const_iterator I = LiveBlocks.begin(),
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E = LiveBlocks.end(); I != E; ++I) {
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E = LiveBlocks.end(); I != E; ++I) {
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float Freq = getBlockFrequency(I->Number);
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float Freq = getBlockFrequency(I->Number);
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@ -288,21 +287,20 @@ void SpillPlacement::iterate(const SmallVectorImpl<unsigned> &Linked) {
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}
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}
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}
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}
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bool
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void SpillPlacement::prepare(BitVector &RegBundles) {
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SpillPlacement::placeSpills(const SmallVectorImpl<BlockConstraint> &LiveBlocks,
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BitVector &RegBundles) {
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// Reuse RegBundles as our ActiveNodes vector.
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// Reuse RegBundles as our ActiveNodes vector.
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ActiveNodes = &RegBundles;
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ActiveNodes = &RegBundles;
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ActiveNodes->clear();
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ActiveNodes->clear();
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ActiveNodes->resize(bundles->getNumBundles());
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ActiveNodes->resize(bundles->getNumBundles());
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}
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// Compute active nodes, links and biases.
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bool
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prepareNodes(LiveBlocks);
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SpillPlacement::finish() {
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assert(ActiveNodes && "Call prepare() first");
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// Update all active nodes, and find the ones that are actually linked to
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// Update all active nodes, and find the ones that are actually linked to
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// something so their value may change when iterating.
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// something so their value may change when iterating.
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SmallVector<unsigned, 8> Linked;
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SmallVector<unsigned, 8> Linked;
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for (int n = RegBundles.find_first(); n>=0; n = RegBundles.find_next(n)) {
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for (int n = ActiveNodes->find_first(); n>=0; n = ActiveNodes->find_next(n)) {
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nodes[n].update(nodes);
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nodes[n].update(nodes);
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// A node that must spill, or a node without any links is not going to
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// A node that must spill, or a node without any links is not going to
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// change its value ever again, so exclude it from iterations.
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// change its value ever again, so exclude it from iterations.
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@ -313,12 +311,13 @@ SpillPlacement::placeSpills(const SmallVectorImpl<BlockConstraint> &LiveBlocks,
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// Iterate the network to convergence.
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// Iterate the network to convergence.
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iterate(Linked);
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iterate(Linked);
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// Write preferences back to RegBundles.
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// Write preferences back to ActiveNodes.
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bool Perfect = true;
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bool Perfect = true;
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for (int n = RegBundles.find_first(); n>=0; n = RegBundles.find_next(n))
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for (int n = ActiveNodes->find_first(); n>=0; n = ActiveNodes->find_next(n))
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if (!nodes[n].preferReg()) {
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if (!nodes[n].preferReg()) {
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RegBundles.reset(n);
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ActiveNodes->reset(n);
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Perfect = false;
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Perfect = false;
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}
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}
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ActiveNodes = 0;
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return Perfect;
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return Perfect;
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}
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}
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@ -10,8 +10,8 @@
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// This analysis computes the optimal spill code placement between basic blocks.
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// This analysis computes the optimal spill code placement between basic blocks.
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//
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//
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// The runOnMachineFunction() method only precomputes some profiling information
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// The runOnMachineFunction() method only precomputes some profiling information
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// about the CFG. The real work is done by placeSpills() which is called by the
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// about the CFG. The real work is done by prepare(), addConstraints(), and
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// register allocator.
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// finish() which are called by the register allocator.
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//
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//
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// Given a variable that is live across multiple basic blocks, and given
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// Given a variable that is live across multiple basic blocks, and given
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// constraints on the basic blocks where the variable is live, determine which
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// constraints on the basic blocks where the variable is live, determine which
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@ -27,6 +27,7 @@
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#ifndef LLVM_CODEGEN_SPILLPLACEMENT_H
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#ifndef LLVM_CODEGEN_SPILLPLACEMENT_H
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#define LLVM_CODEGEN_SPILLPLACEMENT_H
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#define LLVM_CODEGEN_SPILLPLACEMENT_H
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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@ -44,7 +45,7 @@ class SpillPlacement : public MachineFunctionPass {
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const MachineLoopInfo *loops;
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const MachineLoopInfo *loops;
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Node *nodes;
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Node *nodes;
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// Nodes that are active in the current computation. Owned by the placeSpills
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// Nodes that are active in the current computation. Owned by the prepare()
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// caller.
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// caller.
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BitVector *ActiveNodes;
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BitVector *ActiveNodes;
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@ -73,24 +74,31 @@ public:
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BorderConstraint Exit : 8; ///< Constraint on block exit.
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BorderConstraint Exit : 8; ///< Constraint on block exit.
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};
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};
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/// placeSpills - Compute the optimal spill code placement given the
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/// prepare - Reset state and prepare for a new spill placement computation.
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/// constraints. No MustSpill constraints will be violated, and the smallest
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/// possible number of PrefX constraints will be violated, weighted by
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/// expected execution frequencies.
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/// @param LiveBlocks Constraints for blocks that have the variable live in or
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/// live out. DontCare/DontCare means the variable is live
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/// through the block. DontCare/X means the variable is live
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/// out, but not live in.
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/// @param RegBundles Bit vector to receive the edge bundles where the
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/// @param RegBundles Bit vector to receive the edge bundles where the
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/// variable should be kept in a register. Each bit
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/// variable should be kept in a register. Each bit
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/// corresponds to an edge bundle, a set bit means the
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/// corresponds to an edge bundle, a set bit means the
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/// variable should be kept in a register through the
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/// variable should be kept in a register through the
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/// bundle. A clear bit means the variable should be
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/// bundle. A clear bit means the variable should be
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/// spilled.
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/// spilled. This vector is retained.
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void prepare(BitVector &RegBundles);
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/// addConstraints - Add constraints and biases. This method may be called
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/// more than once to accumulate constraints.
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/// @param LiveBlocks Constraints for blocks that have the variable live in or
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/// live out. DontCare/DontCare means the variable is live
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/// through the block. DontCare/X means the variable is live
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/// out, but not live in.
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void addConstraints(ArrayRef<BlockConstraint> LiveBlocks);
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/// finish - Compute the optimal spill code placement given the
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/// constraints. No MustSpill constraints will be violated, and the smallest
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/// possible number of PrefX constraints will be violated, weighted by
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/// expected execution frequencies.
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/// The selected bundles are returned in the bitvector passed to prepare().
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/// @return True if a perfect solution was found, allowing the variable to be
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/// @return True if a perfect solution was found, allowing the variable to be
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/// in a register through all relevant bundles.
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/// in a register through all relevant bundles.
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bool placeSpills(const SmallVectorImpl<BlockConstraint> &LiveBlocks,
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bool finish();
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BitVector &RegBundles);
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/// getBlockFrequency - Return the estimated block execution frequency per
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/// getBlockFrequency - Return the estimated block execution frequency per
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/// function invocation.
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/// function invocation.
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@ -104,7 +112,6 @@ private:
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virtual void releaseMemory();
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virtual void releaseMemory();
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void activate(unsigned);
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void activate(unsigned);
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void prepareNodes(const SmallVectorImpl<BlockConstraint>&);
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void iterate(const SmallVectorImpl<unsigned>&);
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void iterate(const SmallVectorImpl<unsigned>&);
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};
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};
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