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R600/SI: Expand all v16[if]32 operations

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202543 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2014-02-28 21:36:37 +00:00
parent 7166b2820d
commit 9f0d68f522
2 changed files with 41 additions and 1 deletions
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2
lib/Target/R600/SIISelLowering.cpp
View File

@ -150,7 +150,7 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) :
// We only support LOAD/STORE and vector manipulation ops for vectors
// with > 4 elements.
MVT VecTypes[] = {
MVT::v8i32, MVT::v8f32
MVT::v8i32, MVT::v8f32, MVT::v16i32, MVT::v16f32
};
const size_t NumVecTypes = array_lengthof(VecTypes);

40
test/CodeGen/R600/add.ll
View File

@ -76,6 +76,46 @@ entry:
ret void
}
; FUNC-LABEL: @test16
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; EG-CHECK: ADD_INT
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADD_I32
define void @test16(<16 x i32> addrspace(1)* %out, <16 x i32> %a, <16 x i32> %b) {
entry:
%0 = add <16 x i32> %a, %b
store <16 x i32> %0, <16 x i32> addrspace(1)* %out
ret void
}
; FUNC-LABEL: @add64
; SI-CHECK: S_ADD_I32
; SI-CHECK: S_ADDC_U32