mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-10-05 11:17:53 +00:00
Not all targets have efficient ISel code generation for select instructions.
For example, the ARM target does not have efficient ISel handling for vector selects with scalar conditions. This patch adds a TLI hook which allows the different targets to report which selects are supported well and which selects should be converted to CF duting codegen prepare. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163093 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -257,6 +257,11 @@ namespace llvm {
|
||||
|
||||
virtual const char *getTargetNodeName(unsigned Opcode) const;
|
||||
|
||||
virtual bool isSelectSupported(SelectSupportKind Kind) const {
|
||||
// ARM does not support scalar condition selects on vectors.
|
||||
return (Kind != ScalarCondVectorVal);
|
||||
}
|
||||
|
||||
/// getSetCCResultType - Return the value type to use for ISD::SETCC.
|
||||
virtual EVT getSetCCResultType(EVT VT) const;
|
||||
|
||||
|
Reference in New Issue
Block a user