Move thumb and thumb2 tests into separate directories.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74068 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/ARM/dyn-stackalloc.ll

@@ -1,8 +1,4 @@
 ; RUN: llvm-as < %s | llc -march=arm
-; RUN: llvm-as < %s | llc -march=thumb | not grep {ldr sp}
-; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin | \
-; RUN:   not grep {sub.*r7}
-; RUN: llvm-as < %s | llc -march=thumb | grep 4294967280
 
 	%struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
 	%struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }

test/CodeGen/ARM/fpconv.ll

@@ -20,7 +20,6 @@
 ; RUN: grep floatsidf %t
 ; RUN: grep floatunsisf %t
 ; RUN: grep floatunsidf %t
-; RUN: llvm-as < %s | llc -march=thumb
 
 define float @f1(double %x) {
 entry:

test/CodeGen/ARM/fpow.ll

@@ -1,5 +1,4 @@
 ; RUN: llvm-as < %s | llc -march=arm
-; RUN: llvm-as < %s | llc -march=thumb
 
 define double @t(double %x, double %y) nounwind optsize {
 entry:

test/CodeGen/ARM/frame_thumb.ll

@@ -1,9 +0,0 @@
-; RUN: llvm-as < %s | llc -march=thumb -mtriple=arm-apple-darwin \
-; RUN:     -disable-fp-elim | not grep {r11}
-; RUN: llvm-as < %s | llc -march=thumb -mtriple=arm-linux-gnueabi \
-; RUN:     -disable-fp-elim | not grep {r11}
-
-define i32 @f() {
-entry:
-	ret i32 10
-}

test/CodeGen/ARM/iabs.ll

@@ -1,17 +1,10 @@
 ; RUN: llvm-as < %s | llc -march=arm -stats |& \
 ; RUN:   grep {3 .*Number of machine instrs printed}
-; RUN: llvm-as < %s | llc -march=thumb -stats |& \
-; RUN:   grep {4 .*Number of machine instrs printed}
 
 ;; Integer absolute value, should produce something as good as: ARM:
 ;;   add r3, r0, r0, asr #31
 ;;   eor r0, r3, r0, asr #31
 ;;   bx lr
-;; Thumb:
-;;   asr r2, r0, #31
-;;   add r0, r0, r2
-;;   eor r0, r2
-;;   bx lr
 
 define i32 @test(i32 %a) {
         %tmp1neg = sub i32 0, %a

test/CodeGen/ARM/ispositive.ll

@@ -1,5 +1,4 @@
 ; RUN: llvm-as < %s | llc -march=arm | grep {mov r0, r0, lsr #31}
-; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31}
 
 define i32 @test1(i32 %X) {
 entry:

test/CodeGen/ARM/large-stack.ll

@@ -1,5 +1,4 @@
 ; RUN: llvm-as < %s | llc -march=arm
-; RUN: llvm-as < %s | llc -march=thumb | grep {ldr.*LCP} | count 5
 
 define void @test1() {
     %tmp = alloca [ 64 x i32 ] , align 4

test/CodeGen/ARM/ldr_ext.ll

@@ -2,10 +2,6 @@
 ; RUN: llvm-as < %s | llc -march=arm | grep ldrh | count 1
 ; RUN: llvm-as < %s | llc -march=arm | grep ldrsb | count 1
 ; RUN: llvm-as < %s | llc -march=arm | grep ldrsh | count 1
-; RUN: llvm-as < %s | llc -march=thumb | grep ldrb | count 1
-; RUN: llvm-as < %s | llc -march=thumb | grep ldrh | count 1
-; RUN: llvm-as < %s | llc -march=thumb | grep ldrsb | count 1
-; RUN: llvm-as < %s | llc -march=thumb | grep ldrsh | count 1
 
 define i32 @test1(i8* %v.pntr.s0.u1) {
     %tmp.u = load i8* %v.pntr.s0.u1

test/CodeGen/ARM/ldr_frame.ll

@@ -1,5 +1,4 @@
 ; RUN: llvm-as < %s | llc -march=arm | not grep mov
-; RUN: llvm-as < %s | llc -march=thumb | grep cpy | count 2
 
 define i32 @f1() {
 	%buf = alloca [32 x i32], align 4

test/CodeGen/ARM/long-setcc.ll

@@ -1,5 +1,4 @@
 ; RUN: llvm-as < %s | llc -march=arm | grep cmp | count 1
-; RUN: llvm-as < %s | llc -march=thumb | grep cmp | count 1
 
 
 define i1 @t1(i64 %x) {

test/CodeGen/ARM/long.ll

@@ -9,13 +9,6 @@
 ; RUN:   grep smull | count 1
 ; RUN: llvm-as < %s | llc -march=arm | \
 ; RUN:   grep umull | count 1
-; RUN: llvm-as < %s | llc -march=thumb | \
-; RUN:   grep mvn | count 1
-; RUN: llvm-as < %s | llc -march=thumb | \
-; RUN:   grep adc | count 1
-; RUN: llvm-as < %s | llc -march=thumb | \
-; RUN:   grep sbc | count 1
-; RUN: llvm-as < %s | llc -march=thumb | grep __muldi3
 
 define i64 @f1() {
 entry:

test/CodeGen/ARM/long_shift.ll

@@ -1,4 +1,3 @@
-; RUN: llvm-as < %s | llc -march=thumb
 ; RUN: llvm-as < %s | llc -march=arm > %t
 ; RUN: grep rrx %t | count 1
 ; RUN: grep __ashldi3 %t

test/CodeGen/ARM/mul.ll

@@ -1,7 +1,5 @@
 ; RUN: llvm-as < %s | llc -march=arm | grep mul | count 2
 ; RUN: llvm-as < %s | llc -march=arm | grep lsl | count 2
-; RUN: llvm-as < %s | llc -march=thumb | grep mul | count 3
-; RUN: llvm-as < %s | llc -march=thumb | grep lsl | count 1
 
 define i32 @f1(i32 %u) {
     %tmp = mul i32 %u, %u

test/CodeGen/ARM/select.ll

@@ -6,13 +6,6 @@
 ; RUN: llvm-as < %s | llc -march=arm | grep movhi | count 1
 ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
 ; RUN:   grep fcpydmi | count 1
-; RUN: llvm-as < %s | llc -march=thumb | grep beq | count 1
-; RUN: llvm-as < %s | llc -march=thumb | grep bgt | count 1
-; RUN: llvm-as < %s | llc -march=thumb | grep blt | count 3
-; RUN: llvm-as < %s | llc -march=thumb | grep ble | count 1
-; RUN: llvm-as < %s | llc -march=thumb | grep bls | count 1
-; RUN: llvm-as < %s | llc -march=thumb | grep bhi | count 1
-; RUN: llvm-as < %s | llc -march=thumb | grep __ltdf2
 
 define i32 @f1(i32 %a.s) {
 entry:

test/CodeGen/ARM/stack-frame.ll

@@ -1,7 +1,5 @@
 ; RUN: llvm-as < %s | llc -march=arm
 ; RUN: llvm-as < %s | llc -march=arm | grep add | count 1
-; RUN: llvm-as < %s | llc -march=thumb
-; RUN: llvm-as < %s | llc -march=thumb | grep add | count 1
 
 define void @f1() {
 	%c = alloca i8, align 1

test/CodeGen/ARM/tst_teq.ll

@@ -1,6 +1,5 @@
 ; RUN: llvm-as < %s | llc -march=arm | grep tst
 ; RUN: llvm-as < %s | llc -march=arm | grep teq
-; RUN: llvm-as < %s | llc -march=thumb | grep tst
 
 define i32 @f(i32 %a) {
 entry:

test/CodeGen/ARM/unord.ll

@@ -1,7 +1,5 @@
 ; RUN: llvm-as < %s | llc -march=arm | grep movne | count 1
 ; RUN: llvm-as < %s | llc -march=arm | grep moveq | count 1
-; RUN: llvm-as < %s | llc -march=thumb | grep bne | count 1
-; RUN: llvm-as < %s | llc -march=thumb | grep beq | count 1
 
 define i32 @f1(float %X, float %Y) {
 	%tmp = fcmp uno float %X, %Y

test/CodeGen/Thumb/dyn-stackalloc.ll

@@ -0,0 +1,59 @@
+; RUN: llvm-as < %s | llc -march=thumb | not grep {ldr sp}
+; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin | \
+; RUN:   not grep {sub.*r7}
+; RUN: llvm-as < %s | llc -march=thumb | grep 4294967280
+
+	%struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
+	%struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
+
+define void @t1(%struct.state* %v) {
+	%tmp6 = load i32* null
+	%tmp8 = alloca float, i32 %tmp6
+	store i32 1, i32* null
+	br i1 false, label %bb123.preheader, label %return
+
+bb123.preheader:
+	br i1 false, label %bb43, label %return
+
+bb43:
+	call fastcc void @f1( float* %tmp8, float* null, i32 0 )
+	%tmp70 = load i32* null
+	%tmp85 = getelementptr float* %tmp8, i32 0
+	call fastcc void @f2( float* null, float* null, float* %tmp85, i32 %tmp70 )
+	ret void
+
+return:
+	ret void
+}
+
+declare fastcc void @f1(float*, float*, i32)
+
+declare fastcc void @f2(float*, float*, float*, i32)
+
+	%struct.comment = type { i8**, i32*, i32, i8* }
+@str215 = external global [2 x i8]
+
+define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) {
+	%tmp1 = call i32 @strlen( i8* %tag )
+	%tmp3 = call i32 @strlen( i8* %contents )
+	%tmp4 = add i32 %tmp1, 2
+	%tmp5 = add i32 %tmp4, %tmp3
+	%tmp6 = alloca i8, i32 %tmp5
+	%tmp9 = call i8* @strcpy( i8* %tmp6, i8* %tag )
+	%tmp6.len = call i32 @strlen( i8* %tmp6 )
+	%tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len
+	call void @llvm.memcpy.i32( i8* %tmp6.indexed, i8* getelementptr ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1 )
+	%tmp15 = call i8* @strcat( i8* %tmp6, i8* %contents )
+	call fastcc void @comment_add( %struct.comment* %vc, i8* %tmp6 )
+	ret void
+}
+
+declare i32 @strlen(i8*)
+
+declare i8* @strcat(i8*, i8*)
+
+declare fastcc void @comment_add(%struct.comment*, i8*)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare i8* @strcpy(i8*, i8*)

test/CodeGen/Thumb/fpconv.ll

@@ -0,0 +1,61 @@
+; RUN: llvm-as < %s | llc -march=thumb
+
+define float @f1(double %x) {
+entry:
+	%tmp1 = fptrunc double %x to float		; <float> [#uses=1]
+	ret float %tmp1
+}
+
+define double @f2(float %x) {
+entry:
+	%tmp1 = fpext float %x to double		; <double> [#uses=1]
+	ret double %tmp1
+}
+
+define i32 @f3(float %x) {
+entry:
+	%tmp = fptosi float %x to i32		; <i32> [#uses=1]
+	ret i32 %tmp
+}
+
+define i32 @f4(float %x) {
+entry:
+	%tmp = fptoui float %x to i32		; <i32> [#uses=1]
+	ret i32 %tmp
+}
+
+define i32 @f5(double %x) {
+entry:
+	%tmp = fptosi double %x to i32		; <i32> [#uses=1]
+	ret i32 %tmp
+}
+
+define i32 @f6(double %x) {
+entry:
+	%tmp = fptoui double %x to i32		; <i32> [#uses=1]
+	ret i32 %tmp
+}
+
+define float @f7(i32 %a) {
+entry:
+	%tmp = sitofp i32 %a to float		; <float> [#uses=1]
+	ret float %tmp
+}
+
+define double @f8(i32 %a) {
+entry:
+	%tmp = sitofp i32 %a to double		; <double> [#uses=1]
+	ret double %tmp
+}
+
+define float @f9(i32 %a) {
+entry:
+	%tmp = uitofp i32 %a to float		; <float> [#uses=1]
+	ret float %tmp
+}
+
+define double @f10(i32 %a) {
+entry:
+	%tmp = uitofp i32 %a to double		; <double> [#uses=1]
+	ret double %tmp
+}

test/CodeGen/Thumb/fpow.ll

@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -march=thumb
+
+define double @t(double %x, double %y) nounwind optsize {
+entry:
+	%0 = tail call double @llvm.pow.f64( double %x, double %y )		; <double> [#uses=1]
+	ret double %0
+}
+
+declare double @llvm.pow.f64(double, double) nounwind readonly

test/CodeGen/Thumb/frame_thumb.ll

@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin \
+; RUN:     -disable-fp-elim | not grep {r11}
+; RUN: llvm-as < %s | llc -mtriple=thumb-linux-gnueabi \
+; RUN:     -disable-fp-elim | not grep {r11}
+
+define i32 @f() {
+entry:
+	ret i32 10
+}

test/CodeGen/Thumb/iabs.ll

@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llc -march=thumb -stats |& \
+; RUN:   grep {4 .*Number of machine instrs printed}
+
+;; Integer absolute value, should produce something as good as:
+;; Thumb:
+;;   asr r2, r0, #31
+;;   add r0, r0, r2
+;;   eor r0, r2
+;;   bx lr
+
+define i32 @test(i32 %a) {
+        %tmp1neg = sub i32 0, %a
+        %b = icmp sgt i32 %a, -1
+        %abs = select i1 %b, i32 %a, i32 %tmp1neg
+        ret i32 %abs
+}
+

test/CodeGen/Thumb/ispositive.ll

@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31}
+
+define i32 @test1(i32 %X) {
+entry:
+        icmp slt i32 %X, 0              ; <i1>:0 [#uses=1]
+        zext i1 %0 to i32               ; <i32>:1 [#uses=1]
+        ret i32 %1
+}
+

test/CodeGen/Thumb/large-stack.ll

@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=thumb | grep {ldr.*LCP} | count 5
+
+define void @test1() {
+    %tmp = alloca [ 64 x i32 ] , align 4
+    ret void
+}
+
+define void @test2() {
+    %tmp = alloca [ 4168 x i8 ] , align 4
+    ret void
+}
+
+define i32 @test3() {
+	%retval = alloca i32, align 4
+	%tmp = alloca i32, align 4
+	%a = alloca [805306369 x i8], align 16
+	store i32 0, i32* %tmp
+	%tmp1 = load i32* %tmp
+        ret i32 %tmp1
+}

test/CodeGen/Thumb/ldr_ext.ll

@@ -0,0 +1,28 @@
+; RUN: llvm-as < %s | llc -march=thumb | grep ldrb | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep ldrh | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep ldrsb | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep ldrsh | count 1
+
+define i32 @test1(i8* %v.pntr.s0.u1) {
+    %tmp.u = load i8* %v.pntr.s0.u1
+    %tmp1.s = zext i8 %tmp.u to i32
+    ret i32 %tmp1.s
+}
+
+define i32 @test2(i16* %v.pntr.s0.u1) {
+    %tmp.u = load i16* %v.pntr.s0.u1
+    %tmp1.s = zext i16 %tmp.u to i32
+    ret i32 %tmp1.s
+}
+
+define i32 @test3(i8* %v.pntr.s1.u0) {
+    %tmp.s = load i8* %v.pntr.s1.u0
+    %tmp1.s = sext i8 %tmp.s to i32
+    ret i32 %tmp1.s
+}
+
+define i32 @test4() {
+    %tmp.s = load i16* null
+    %tmp1.s = sext i16 %tmp.s to i32
+    ret i32 %tmp1.s
+}

test/CodeGen/Thumb/ldr_frame.ll

@@ -0,0 +1,31 @@
+; RUN: llvm-as < %s | llc -march=thumb | grep cpy | count 2
+
+define i32 @f1() {
+	%buf = alloca [32 x i32], align 4
+	%tmp = getelementptr [32 x i32]* %buf, i32 0, i32 0
+	%tmp1 = load i32* %tmp
+	ret i32 %tmp1
+}
+
+define i32 @f2() {
+	%buf = alloca [32 x i8], align 4
+	%tmp = getelementptr [32 x i8]* %buf, i32 0, i32 0
+	%tmp1 = load i8* %tmp
+        %tmp2 = zext i8 %tmp1 to i32
+	ret i32 %tmp2
+}
+
+define i32 @f3() {
+	%buf = alloca [32 x i32], align 4
+	%tmp = getelementptr [32 x i32]* %buf, i32 0, i32 32
+	%tmp1 = load i32* %tmp
+	ret i32 %tmp1
+}
+
+define i32 @f4() {
+	%buf = alloca [32 x i8], align 4
+	%tmp = getelementptr [32 x i8]* %buf, i32 0, i32 2
+	%tmp1 = load i8* %tmp
+        %tmp2 = zext i8 %tmp1 to i32
+	ret i32 %tmp2
+}

test/CodeGen/Thumb/long-setcc.ll

@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llc -march=thumb | grep cmp | count 1
+
+
+define i1 @t1(i64 %x) {
+	%B = icmp slt i64 %x, 0
+	ret i1 %B
+}
+
+define i1 @t2(i64 %x) {
+	%tmp = icmp ult i64 %x, 4294967296
+	ret i1 %tmp
+}
+
+define i1 @t3(i32 %x) {
+	%tmp = icmp ugt i32 %x, -1
+	ret i1 %tmp
+}

test/CodeGen/Thumb/long.ll

@@ -0,0 +1,76 @@
+; RUN: llvm-as < %s | llc -march=thumb | \
+; RUN:   grep mvn | count 1
+; RUN: llvm-as < %s | llc -march=thumb | \
+; RUN:   grep adc | count 1
+; RUN: llvm-as < %s | llc -march=thumb | \
+; RUN:   grep sbc | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep __muldi3
+
+define i64 @f1() {
+entry:
+        ret i64 0
+}
+
+define i64 @f2() {
+entry:
+        ret i64 1
+}
+
+define i64 @f3() {
+entry:
+        ret i64 2147483647
+}
+
+define i64 @f4() {
+entry:
+        ret i64 2147483648
+}
+
+define i64 @f5() {
+entry:
+        ret i64 9223372036854775807
+}
+
+define i64 @f6(i64 %x, i64 %y) {
+entry:
+        %tmp1 = add i64 %y, 1           ; <i64> [#uses=1]
+        ret i64 %tmp1
+}
+
+define void @f7() {
+entry:
+        %tmp = call i64 @f8( )          ; <i64> [#uses=0]
+        ret void
+}
+
+declare i64 @f8()
+
+define i64 @f9(i64 %a, i64 %b) {
+entry:
+        %tmp = sub i64 %a, %b           ; <i64> [#uses=1]
+        ret i64 %tmp
+}
+
+define i64 @f(i32 %a, i32 %b) {
+entry:
+        %tmp = sext i32 %a to i64               ; <i64> [#uses=1]
+        %tmp1 = sext i32 %b to i64              ; <i64> [#uses=1]
+        %tmp2 = mul i64 %tmp1, %tmp             ; <i64> [#uses=1]
+        ret i64 %tmp2
+}
+
+define i64 @g(i32 %a, i32 %b) {
+entry:
+        %tmp = zext i32 %a to i64               ; <i64> [#uses=1]
+        %tmp1 = zext i32 %b to i64              ; <i64> [#uses=1]
+        %tmp2 = mul i64 %tmp1, %tmp             ; <i64> [#uses=1]
+        ret i64 %tmp2
+}
+
+define i64 @f10() {
+entry:
+        %a = alloca i64, align 8                ; <i64*> [#uses=1]
+        %retval = load i64* %a          ; <i64> [#uses=1]
+        ret i64 %retval
+}
+

test/CodeGen/Thumb/select.ll

@@ -0,0 +1,55 @@
+; RUN: llvm-as < %s | llc -march=thumb | grep beq | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep bgt | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep blt | count 3
+; RUN: llvm-as < %s | llc -march=thumb | grep ble | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep bls | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep bhi | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep __ltdf2
+
+define i32 @f1(i32 %a.s) {
+entry:
+    %tmp = icmp eq i32 %a.s, 4
+    %tmp1.s = select i1 %tmp, i32 2, i32 3
+    ret i32 %tmp1.s
+}
+
+define i32 @f2(i32 %a.s) {
+entry:
+    %tmp = icmp sgt i32 %a.s, 4
+    %tmp1.s = select i1 %tmp, i32 2, i32 3
+    ret i32 %tmp1.s
+}
+
+define i32 @f3(i32 %a.s, i32 %b.s) {
+entry:
+    %tmp = icmp slt i32 %a.s, %b.s
+    %tmp1.s = select i1 %tmp, i32 2, i32 3
+    ret i32 %tmp1.s
+}
+
+define i32 @f4(i32 %a.s, i32 %b.s) {
+entry:
+    %tmp = icmp sle i32 %a.s, %b.s
+    %tmp1.s = select i1 %tmp, i32 2, i32 3
+    ret i32 %tmp1.s
+}
+
+define i32 @f5(i32 %a.u, i32 %b.u) {
+entry:
+    %tmp = icmp ule i32 %a.u, %b.u
+    %tmp1.s = select i1 %tmp, i32 2, i32 3
+    ret i32 %tmp1.s
+}
+
+define i32 @f6(i32 %a.u, i32 %b.u) {
+entry:
+    %tmp = icmp ugt i32 %a.u, %b.u
+    %tmp1.s = select i1 %tmp, i32 2, i32 3
+    ret i32 %tmp1.s
+}
+
+define double @f7(double %a, double %b) {
+    %tmp = fcmp olt double %a, 1.234e+00
+    %tmp1 = select i1 %tmp, double -1.000e+00, double %b
+    ret double %tmp1
+}

test/CodeGen/Thumb/stack-frame.ll

@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -march=thumb
+; RUN: llvm-as < %s | llc -march=thumb | grep add | count 1
+
+define void @f1() {
+	%c = alloca i8, align 1
+	ret void
+}
+
+define i32 @f2() {
+	ret i32 1
+}
+
+

test/CodeGen/Thumb/tst_teq.ll

@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llc -march=thumb | grep tst
+
+define i32 @f(i32 %a) {
+entry:
+	%tmp2 = and i32 %a, 255		; <i32> [#uses=1]
+	icmp eq i32 %tmp2, 0		; <i1>:0 [#uses=1]
+	%retval = select i1 %0, i32 20, i32 10		; <i32> [#uses=1]
+	ret i32 %retval
+}
+
+define i32 @g(i32 %a) {
+entry:
+        %tmp2 = xor i32 %a, 255
+	icmp eq i32 %tmp2, 0		; <i1>:0 [#uses=1]
+	%retval = select i1 %0, i32 20, i32 10		; <i32> [#uses=1]
+	ret i32 %retval
+}

test/CodeGen/Thumb/unord.ll

@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -march=thumb | grep bne | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep beq | count 1
+
+define i32 @f1(float %X, float %Y) {
+	%tmp = fcmp uno float %X, %Y
+	%retval = select i1 %tmp, i32 1, i32 -1
+	ret i32 %retval
+}
+
+define i32 @f2(float %X, float %Y) {
+	%tmp = fcmp ord float %X, %Y
+	%retval = select i1 %tmp, i32 1, i32 -1
+	ret i32 %retval
+}

test/CodeGen/Thumb/vargs.ll

@@ -1,6 +1,6 @@
 ; RUN: llvm-as < %s | llc -march=thumb
-; RUN: llvm-as < %s | llc -mtriple=arm-linux -march=thumb | grep pop | count 1
-; RUN: llvm-as < %s | llc -mtriple=arm-darwin -march=thumb | grep pop | count 2
+; RUN: llvm-as < %s | llc -mtriple=thumb-linux | grep pop | count 1
+; RUN: llvm-as < %s | llc -mtriple=thumb-darwin | grep pop | count 2
 
 @str = internal constant [4 x i8] c"%d\0A\00"           ; <[4 x i8]*> [#uses=1]