Remove the TargetMachine forwards for TargetSubtargetInfo based

information and update all callers. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214781 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
2014-08-04 21:25:23 +00:00
parent ffa13eafbf
commit 9f85dccfc6
297 changed files with 2215 additions and 1721 deletions

View File

@ -78,7 +78,8 @@ bool AtomicExpandLoadLinked::runOnFunction(Function &F) {
bool MadeChange = false;
for (Instruction *Inst : AtomicInsts) {
if (!TM->getTargetLowering()->shouldExpandAtomicInIR(Inst))
if (!TM->getSubtargetImpl()->getTargetLowering()->shouldExpandAtomicInIR(
Inst))
continue;
if (AtomicRMWInst *AI = dyn_cast<AtomicRMWInst>(Inst))
@ -100,13 +101,14 @@ bool AtomicExpandLoadLinked::expandAtomicLoad(LoadInst *LI) {
// Load instructions don't actually need a leading fence, even in the
// SequentiallyConsistent case.
AtomicOrdering MemOpOrder =
TM->getTargetLowering()->getInsertFencesForAtomic() ? Monotonic
: LI->getOrdering();
TM->getSubtargetImpl()->getTargetLowering()->getInsertFencesForAtomic()
? Monotonic
: LI->getOrdering();
// The only 64-bit load guaranteed to be single-copy atomic by the ARM ARM is
// an ldrexd (A3.5.3).
IRBuilder<> Builder(LI);
Value *Val = TM->getTargetLowering()->emitLoadLinked(
Value *Val = TM->getSubtargetImpl()->getTargetLowering()->emitLoadLinked(
Builder, LI->getPointerOperand(), MemOpOrder);
insertTrailingFence(Builder, LI->getOrdering());
@ -168,8 +170,8 @@ bool AtomicExpandLoadLinked::expandAtomicRMW(AtomicRMWInst *AI) {
// Start the main loop block now that we've taken care of the preliminaries.
Builder.SetInsertPoint(LoopBB);
Value *Loaded =
TM->getTargetLowering()->emitLoadLinked(Builder, Addr, MemOpOrder);
Value *Loaded = TM->getSubtargetImpl()->getTargetLowering()->emitLoadLinked(
Builder, Addr, MemOpOrder);
Value *NewVal;
switch (AI->getOperation()) {
@ -215,8 +217,9 @@ bool AtomicExpandLoadLinked::expandAtomicRMW(AtomicRMWInst *AI) {
llvm_unreachable("Unknown atomic op");
}
Value *StoreSuccess = TM->getTargetLowering()->emitStoreConditional(
Builder, NewVal, Addr, MemOpOrder);
Value *StoreSuccess =
TM->getSubtargetImpl()->getTargetLowering()->emitStoreConditional(
Builder, NewVal, Addr, MemOpOrder);
Value *TryAgain = Builder.CreateICmpNE(
StoreSuccess, ConstantInt::get(IntegerType::get(Ctx, 32), 0), "tryagain");
Builder.CreateCondBr(TryAgain, LoopBB, ExitBB);
@ -282,8 +285,8 @@ bool AtomicExpandLoadLinked::expandAtomicCmpXchg(AtomicCmpXchgInst *CI) {
// Start the main loop block now that we've taken care of the preliminaries.
Builder.SetInsertPoint(LoopBB);
Value *Loaded =
TM->getTargetLowering()->emitLoadLinked(Builder, Addr, MemOpOrder);
Value *Loaded = TM->getSubtargetImpl()->getTargetLowering()->emitLoadLinked(
Builder, Addr, MemOpOrder);
Value *ShouldStore =
Builder.CreateICmpEQ(Loaded, CI->getCompareOperand(), "should_store");
@ -292,8 +295,9 @@ bool AtomicExpandLoadLinked::expandAtomicCmpXchg(AtomicCmpXchgInst *CI) {
Builder.CreateCondBr(ShouldStore, TryStoreBB, FailureBB);
Builder.SetInsertPoint(TryStoreBB);
Value *StoreSuccess = TM->getTargetLowering()->emitStoreConditional(
Builder, CI->getNewValOperand(), Addr, MemOpOrder);
Value *StoreSuccess =
TM->getSubtargetImpl()->getTargetLowering()->emitStoreConditional(
Builder, CI->getNewValOperand(), Addr, MemOpOrder);
StoreSuccess = Builder.CreateICmpEQ(
StoreSuccess, ConstantInt::get(Type::getInt32Ty(Ctx), 0), "success");
Builder.CreateCondBr(StoreSuccess, SuccessBB,
@ -357,7 +361,7 @@ bool AtomicExpandLoadLinked::expandAtomicCmpXchg(AtomicCmpXchgInst *CI) {
AtomicOrdering AtomicExpandLoadLinked::insertLeadingFence(IRBuilder<> &Builder,
AtomicOrdering Ord) {
if (!TM->getTargetLowering()->getInsertFencesForAtomic())
if (!TM->getSubtargetImpl()->getTargetLowering()->getInsertFencesForAtomic())
return Ord;
if (Ord == Release || Ord == AcquireRelease || Ord == SequentiallyConsistent)
@ -370,7 +374,7 @@ AtomicOrdering AtomicExpandLoadLinked::insertLeadingFence(IRBuilder<> &Builder,
void AtomicExpandLoadLinked::insertTrailingFence(IRBuilder<> &Builder,
AtomicOrdering Ord) {
if (!TM->getTargetLowering()->getInsertFencesForAtomic())
if (!TM->getSubtargetImpl()->getTargetLowering()->getInsertFencesForAtomic())
return;
if (Ord == Acquire || Ord == AcquireRelease)