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Remove the TargetMachine forwards for TargetSubtargetInfo based

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information and update all callers. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214781 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
2014-08-04 21:25:23 +00:00
parent ffa13eafbf
commit 9f85dccfc6
297 changed files with 2215 additions and 1721 deletions
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3
lib/CodeGen/TargetSchedule.cpp
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@ -290,7 +290,8 @@ computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx,
// for predicated defs.
unsigned Reg = DefMI->getOperand(DefOperIdx).getReg();
const MachineFunction &MF = *DefMI->getParent()->getParent();
const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
const TargetRegisterInfo *TRI =
MF.getTarget().getSubtargetImpl()->getRegisterInfo();
if (!DepMI->readsRegister(Reg, TRI) && TII->isPredicated(DepMI))
return computeInstrLatency(DefMI);