mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-11-23 00:20:25 +00:00
Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214781 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -76,7 +76,8 @@ void ARMAsmPrinter::EmitFunctionEntryLabel() {
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}
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void ARMAsmPrinter::EmitXXStructor(const Constant *CV) {
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uint64_t Size = TM.getDataLayout()->getTypeAllocSize(CV->getType());
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uint64_t Size =
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TM.getSubtargetImpl()->getDataLayout()->getTypeAllocSize(CV->getType());
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assert(Size && "C++ constructor pointer had zero size!");
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const GlobalValue *GV = dyn_cast<GlobalValue>(CV->stripPointerCasts());
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@@ -136,7 +137,8 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
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assert(!MO.getSubReg() && "Subregs should be eliminated!");
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if(ARM::GPRPairRegClass.contains(Reg)) {
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const MachineFunction &MF = *MI->getParent()->getParent();
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const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
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const TargetRegisterInfo *TRI =
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MF.getTarget().getSubtargetImpl()->getRegisterInfo();
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Reg = TRI->getSubReg(Reg, ARM::gsub_0);
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}
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O << ARMInstPrinter::getRegisterName(Reg);
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@@ -182,7 +184,7 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
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MCSymbol *ARMAsmPrinter::
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GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const {
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const DataLayout *DL = TM.getDataLayout();
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const DataLayout *DL = TM.getSubtargetImpl()->getDataLayout();
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SmallString<60> Name;
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raw_svector_ostream(Name) << DL->getPrivateGlobalPrefix() << "JTI"
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<< getFunctionNumber() << '_' << uid << '_' << uid2;
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@@ -191,7 +193,7 @@ GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const {
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MCSymbol *ARMAsmPrinter::GetARMSJLJEHLabel() const {
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const DataLayout *DL = TM.getDataLayout();
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const DataLayout *DL = TM.getSubtargetImpl()->getDataLayout();
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SmallString<60> Name;
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raw_svector_ostream(Name) << DL->getPrivateGlobalPrefix() << "SJLJEH"
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<< getFunctionNumber();
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@@ -229,7 +231,8 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
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case 'y': // Print a VFP single precision register as indexed double.
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if (MI->getOperand(OpNum).isReg()) {
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unsigned Reg = MI->getOperand(OpNum).getReg();
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const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
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const TargetRegisterInfo *TRI =
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MF->getTarget().getSubtargetImpl()->getRegisterInfo();
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// Find the 'd' register that has this 's' register as a sub-register,
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// and determine the lane number.
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for (MCSuperRegIterator SR(Reg, TRI); SR.isValid(); ++SR) {
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@@ -261,7 +264,8 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
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// inline asm statement.
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O << "{";
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if (ARM::GPRPairRegClass.contains(RegBegin)) {
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const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
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const TargetRegisterInfo *TRI =
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MF->getTarget().getSubtargetImpl()->getRegisterInfo();
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unsigned Reg0 = TRI->getSubReg(RegBegin, ARM::gsub_0);
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O << ARMInstPrinter::getRegisterName(Reg0) << ", ";
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RegBegin = TRI->getSubReg(RegBegin, ARM::gsub_1);
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@@ -317,7 +321,8 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
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const MachineOperand &MO = MI->getOperand(OpNum);
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if (!MO.isReg())
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return true;
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const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
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const TargetRegisterInfo *TRI =
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MF->getTarget().getSubtargetImpl()->getRegisterInfo();
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unsigned Reg = TRI->getSubReg(MO.getReg(), ExtraCode[0] == 'Q' ?
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ARM::gsub_0 : ARM::gsub_1);
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O << ARMInstPrinter::getRegisterName(Reg);
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@@ -343,7 +348,8 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
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unsigned Reg = MI->getOperand(OpNum).getReg();
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if (!ARM::QPRRegClass.contains(Reg))
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return true;
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const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
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const TargetRegisterInfo *TRI =
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MF->getTarget().getSubtargetImpl()->getRegisterInfo();
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unsigned SubReg = TRI->getSubReg(Reg, ExtraCode[0] == 'e' ?
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ARM::dsub_0 : ARM::dsub_1);
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O << ARMInstPrinter::getRegisterName(SubReg);
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@@ -358,7 +364,8 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
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if (!MO.isReg())
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return true;
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const MachineFunction &MF = *MI->getParent()->getParent();
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const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
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const TargetRegisterInfo *TRI =
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MF.getTarget().getSubtargetImpl()->getRegisterInfo();
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unsigned Reg = MO.getReg();
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if(!ARM::GPRPairRegClass.contains(Reg))
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return false;
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@@ -561,7 +568,7 @@ void ARMAsmPrinter::EmitEndOfAsmFile(Module &M) {
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MachineModuleInfoELF::SymbolListTy Stubs = MMIELF.GetGVStubList();
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if (!Stubs.empty()) {
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OutStreamer.SwitchSection(TLOFELF.getDataRelSection());
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const DataLayout *TD = TM.getDataLayout();
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const DataLayout *TD = TM.getSubtargetImpl()->getDataLayout();
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for (auto &stub: Stubs) {
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OutStreamer.EmitLabel(stub.first);
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@@ -848,8 +855,9 @@ MCSymbol *ARMAsmPrinter::GetARMGVSymbol(const GlobalValue *GV,
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void ARMAsmPrinter::
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EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
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const DataLayout *DL = TM.getDataLayout();
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int Size = TM.getDataLayout()->getTypeAllocSize(MCPV->getType());
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const DataLayout *DL = TM.getSubtargetImpl()->getDataLayout();
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int Size =
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TM.getSubtargetImpl()->getDataLayout()->getTypeAllocSize(MCPV->getType());
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ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
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@@ -1027,7 +1035,8 @@ void ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) {
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MCTargetStreamer &TS = *OutStreamer.getTargetStreamer();
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ARMTargetStreamer &ATS = static_cast<ARMTargetStreamer &>(TS);
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const MachineFunction &MF = *MI->getParent()->getParent();
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const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
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const TargetRegisterInfo *RegInfo =
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MF.getTarget().getSubtargetImpl()->getRegisterInfo();
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const ARMFunctionInfo &AFI = *MF.getInfo<ARMFunctionInfo>();
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unsigned FramePtr = RegInfo->getFrameRegister(MF);
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@@ -1165,7 +1174,7 @@ void ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) {
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#include "ARMGenMCPseudoLowering.inc"
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void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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const DataLayout *DL = TM.getDataLayout();
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const DataLayout *DL = TM.getSubtargetImpl()->getDataLayout();
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// If we just ended a constant pool, mark it as such.
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if (InConstantPool && MI->getOpcode() != ARM::CONSTPOOL_ENTRY) {
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