6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-11-01 15:17:25 +00:00
Code Issues Projects Releases Wiki Activity

Generate the fchs instruction to negate a floating point number

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11078 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2004-02-02 19:31:38 +00:00
parent 4a06f35484
commit 9f8fd6d9ea
3 changed files with 22 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
lib/Target/X86/X86ISelSimple.cpp
View File

@@ -1227,7 +1227,13 @@ void ISel::emitSimpleBinaryOperation(MachineBasicBlock *MBB,
return;
}
}
}
} else if (ConstantFP *CFP = dyn_cast<ConstantFP>(Op0))
if (CFP->isExactlyValue(-0.0)) {
// -0.0 - X === -X
unsigned op1Reg = getReg(Op1, MBB, IP);
BMI(MBB, IP, X86::FCHS, 1, DestReg).addReg(op1Reg);
return;
}
if (!isa<ConstantInt>(Op1) || Class == cLong) {
static const unsigned OpcodeTab[][4] = {