From a02556679e685280bd59e0197d9e4aa51d40480c Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Fri, 3 Feb 2012 06:52:33 +0000 Subject: [PATCH] Remove getShuffleVPERMILPImmediate function, getShuffleSHUFImmediate performs the same calculation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149683 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 31 +----------------------------- 1 file changed, 1 insertion(+), 30 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 80962847a68..941f87bfc5a 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -3743,35 +3743,6 @@ static bool isVPERMILPMask(ArrayRef Mask, EVT VT, bool HasAVX) { return true; } -/// getShuffleVPERMILPImmediate - Return the appropriate immediate to shuffle -/// the specified VECTOR_MASK mask with VPERMILPS/D* instructions. -static unsigned getShuffleVPERMILPImmediate(ShuffleVectorSDNode *SVOp) { - EVT VT = SVOp->getValueType(0); - - unsigned NumElts = VT.getVectorNumElements(); - unsigned NumLanes = VT.getSizeInBits()/128; - unsigned LaneSize = NumElts/NumLanes; - - // Although the mask is equal for both lanes do it twice to get the cases - // where a mask will match because the same mask element is undef on the - // first half but valid on the second. This would get pathological cases - // such as: shuffle , which is completely valid. - unsigned Shift = (LaneSize == 4) ? 2 : 1; - unsigned Mask = 0; - for (unsigned i = 0; i != NumElts; ++i) { - int MaskElt = SVOp->getMaskElt(i); - if (MaskElt < 0) - continue; - MaskElt %= LaneSize; - unsigned Shamt = i; - // VPERMILPSY, the mask of the first half must be equal to the second one - if (NumElts == 8) Shamt %= LaneSize; - Mask |= MaskElt << (Shamt*Shift); - } - - return Mask; -} - /// isCommutedMOVL - Returns true if the shuffle mask is except the reverse /// of what x86 movss want. X86 movs requires the lowest element to be lowest /// element of vector 2 and the other elements to come from vector 1 in order. @@ -6673,7 +6644,7 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const { // Handle VPERMILPS/D* permutations if (isVPERMILPMask(M, VT, HasAVX)) return getTargetShuffleNode(X86ISD::VPERMILP, dl, VT, V1, - getShuffleVPERMILPImmediate(SVOp), DAG); + X86::getShuffleSHUFImmediate(SVOp), DAG); // Handle VPERM2F128/VPERM2I128 permutations if (isVPERM2X128Mask(M, VT, HasAVX))