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Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672.
This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc turned on. Given a clean nightly tester run, we should be able to turn it on by default! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24578 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3067,6 +3067,20 @@ void ISel::EmitFastCCToFastCCTailCall(SDNode *TailCallNode) {
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// TODO: handle jmp [mem]
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if (!isDirect) {
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// We do not want the register allocator to allocate CalleeReg to a callee
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// saved register, as these will be restored before the JMP. To prevent
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// this, emit explicit clobbers of callee saved regs here. A better way to
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// solve this would be to specify that the register constraints of TAILJMPr
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// only allow registers that are not callee saved, but we currently can't
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// express that. This forces all four of these regs to be saved and
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// reloaded for all functions with an indirect tail call.
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// TODO: Improve this!
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BuildMI(BB, X86::IMPLICIT_DEF, 4)
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.addReg(X86::ESI, MachineOperand::Def)
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.addReg(X86::EDI, MachineOperand::Def)
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.addReg(X86::EBX, MachineOperand::Def)
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.addReg(X86::EBP, MachineOperand::Def);
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BuildMI(BB, X86::TAILJMPr, 1).addReg(CalleeReg);
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} else if (GlobalAddressSDNode *GASD = dyn_cast<GlobalAddressSDNode>(Callee)){
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BuildMI(BB, X86::TAILJMPd, 1).addGlobalAddress(GASD->getGlobal(), true);
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