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Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672.

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This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc
turned on.  Given a clean nightly tester run, we should be able to turn it
on by default!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24578 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-12-03 07:15:55 +00:00
parent 8e22200f2b
commit a027ba885a
1 changed files with 14 additions and 0 deletions
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14
lib/Target/X86/X86ISelPattern.cpp
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@ -3067,6 +3067,20 @@ void ISel::EmitFastCCToFastCCTailCall(SDNode *TailCallNode) {
// TODO: handle jmp [mem] // TODO: handle jmp [mem]
if (!isDirect) { if (!isDirect) {
// We do not want the register allocator to allocate CalleeReg to a callee
// saved register, as these will be restored before the JMP. To prevent
// this, emit explicit clobbers of callee saved regs here. A better way to
// solve this would be to specify that the register constraints of TAILJMPr
// only allow registers that are not callee saved, but we currently can't
// express that. This forces all four of these regs to be saved and
// reloaded for all functions with an indirect tail call.
// TODO: Improve this!
BuildMI(BB, X86::IMPLICIT_DEF, 4)
.addReg(X86::ESI, MachineOperand::Def)
.addReg(X86::EDI, MachineOperand::Def)
.addReg(X86::EBX, MachineOperand::Def)
.addReg(X86::EBP, MachineOperand::Def);
BuildMI(BB, X86::TAILJMPr, 1).addReg(CalleeReg); BuildMI(BB, X86::TAILJMPr, 1).addReg(CalleeReg);
} else if (GlobalAddressSDNode *GASD = dyn_cast<GlobalAddressSDNode>(Callee)){ } else if (GlobalAddressSDNode *GASD = dyn_cast<GlobalAddressSDNode>(Callee)){
BuildMI(BB, X86::TAILJMPd, 1).addGlobalAddress(GASD->getGlobal(), true); BuildMI(BB, X86::TAILJMPd, 1).addGlobalAddress(GASD->getGlobal(), true);