6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-06-21 02:24:22 +00:00
Code Issues Projects Releases Wiki Activity

Fix misoptimization of: xor i1 (icmp eq (X, C1), icmp s[lg]t (X, C2))

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56834 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nick Lewycky
2008-09-30 06:08:34 +00:00
parent 5396c99baa
commit a06cf82a7b
2 changed files with 13 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
lib/Transforms/Scalar/InstructionCombining.cpp
View File

@ -3023,7 +3023,7 @@ Instruction *InstCombiner::visitSRem(BinaryOperator &I) {
I.setOperand(1, RHSNeg);
return &I;
}
// If the sign bits of both operands are zero (i.e. we can prove they are
// unsigned inputs), turn this into a urem.
if (I.getType()->isInteger()) {
@ -4205,7 +4205,8 @@ Instruction *InstCombiner::visitOr(BinaryOperator &I) {
// Ensure that the larger constant is on the RHS.
ICmpInst *LHS = cast<ICmpInst>(Op0);
bool NeedsSwap;
if (ICmpInst::isSignedPredicate(LHSCC))
if (ICmpInst::isEquality(LHSCC) ? ICmpInst::isSignedPredicate(RHSCC)
: ICmpInst::isSignedPredicate(LHSCC))
NeedsSwap = LHSCst->getValue().sgt(RHSCst->getValue());
else
NeedsSwap = LHSCst->getValue().ugt(RHSCst->getValue());