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Use pcmpeq to generate vector of all ones.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27167 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-03-27 07:00:16 +00:00
parent 999f3b538f
commit a0b3afbe14
2 changed files with 15 additions and 0 deletions
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4
lib/Target/X86/X86ISelLowering.cpp
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@ -2364,6 +2364,10 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
abort(); abort();
} }
case ISD::BUILD_VECTOR: { case ISD::BUILD_VECTOR: {
// All one's are handled with pcmpeqd.
if (ISD::isBuildVectorAllOnes(Op.Val))
return Op;
std::set<SDOperand> Values; std::set<SDOperand> Values;
SDOperand Elt0 = Op.getOperand(0); SDOperand Elt0 = Op.getOperand(0);
Values.insert(Elt0); Values.insert(Elt0);

11
lib/Target/X86/X86InstrSSE.td
View File

@ -1008,6 +1008,10 @@ def V_SET0_PD : PDI<0x57, MRMInitReg, (ops VR128:$dst),
"xorpd $dst, $dst", "xorpd $dst, $dst",
[(set VR128:$dst, (v2f64 immAllZerosV))]>; [(set VR128:$dst, (v2f64 immAllZerosV))]>;
def V_SETALLONES : PDI<0x76, MRMInitReg, (ops VR128:$dst),
"pcmpeqd $dst, $dst",
[(set VR128:$dst, (v2f64 immAllOnesV))]>;
// Scalar to 128-bit vector with zero extension. // Scalar to 128-bit vector with zero extension.
// Three operand (but two address) aliases. // Three operand (but two address) aliases.
let isTwoAddress = 1 in { let isTwoAddress = 1 in {
@ -1051,6 +1055,13 @@ def : Pat<(v16i8 immAllZerosV), (v16i8 (V_SET0_PI))>, Requires<[HasSSE2]>;
def : Pat<(v8i16 immAllZerosV), (v8i16 (V_SET0_PI))>, Requires<[HasSSE2]>; def : Pat<(v8i16 immAllZerosV), (v8i16 (V_SET0_PI))>, Requires<[HasSSE2]>;
def : Pat<(v4i32 immAllZerosV), (v4i32 (V_SET0_PI))>, Requires<[HasSSE2]>; def : Pat<(v4i32 immAllZerosV), (v4i32 (V_SET0_PI))>, Requires<[HasSSE2]>;
// 128-bit vector all one's.
def : Pat<(v16i8 immAllOnesV), (v16i8 (V_SETALLONES))>, Requires<[HasSSE2]>;
def : Pat<(v8i16 immAllOnesV), (v8i16 (V_SETALLONES))>, Requires<[HasSSE2]>;
def : Pat<(v4i32 immAllOnesV), (v4i32 (V_SETALLONES))>, Requires<[HasSSE2]>;
def : Pat<(v2i64 immAllOnesV), (v2i64 (V_SETALLONES))>, Requires<[HasSSE2]>;
def : Pat<(v4f32 immAllOnesV), (v4f32 (V_SETALLONES))>, Requires<[HasSSE1]>;
// Load 128-bit integer vector values. // Load 128-bit integer vector values.
def : Pat<(v16i8 (load addr:$src)), (MOVDQArm addr:$src)>, def : Pat<(v16i8 (load addr:$src)), (MOVDQArm addr:$src)>,
Requires<[HasSSE2]>; Requires<[HasSSE2]>;