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https://github.com/c64scene-ar/llvm-6502.git
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simplify the way operand flags and constraints are handled, making it easier
to extend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31481 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -60,6 +60,9 @@ namespace llvm {
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/// MIOperandInfo - Default MI operand type. Note an operand may be made
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/// up of multiple MI operands.
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DagInit *MIOperandInfo;
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/// Constraint info for this operand.
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std::string Constraint;
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OperandInfo(Record *R, const std::string &N, const std::string &PMN,
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unsigned MION, unsigned MINO, DagInit *MIOI)
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@ -71,14 +74,6 @@ namespace llvm {
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/// type (which is a record).
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std::vector<OperandInfo> OperandList;
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/// ConstraintStr - The operand constraints string.
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///
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std::string ConstraintStr;
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/// ConstraintsList - List of constraints, encoded into one unsigned int per
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/// operand.
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std::vector<unsigned> ConstraintsList;
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// Various boolean values we track for the instruction.
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bool isReturn;
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bool isBranch;
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@ -19,7 +19,6 @@
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#include "Record.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include <set>
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#include <algorithm>
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using namespace llvm;
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@ -274,8 +273,8 @@ bool CodeGenTarget::isLittleEndianEncoding() const {
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return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
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}
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static std::pair<unsigned, unsigned> parseConstraint(const std::string &CStr,
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CodeGenInstruction *I) {
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static std::string ParseConstraint(const std::string &CStr,
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CodeGenInstruction *I, unsigned &DestOp) {
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const std::string ops("="); // FIXME: Only supports TIED_TO for now.
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std::string::size_type pos = CStr.find_first_of(ops);
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assert(pos != std::string::npos && "Unrecognized constraint");
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@ -286,26 +285,24 @@ static std::pair<unsigned, unsigned> parseConstraint(const std::string &CStr,
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std::string::size_type wpos = Name.find_first_of(delims);
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if (wpos != std::string::npos)
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Name = Name.substr(0, wpos);
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unsigned FIdx = I->getOperandNamed(Name);
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DestOp = I->getOperandNamed(Name);
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Name = CStr.substr(pos+1);
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wpos = Name.find_first_not_of(delims);
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if (wpos != std::string::npos)
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Name = Name.substr(wpos+1);
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unsigned TIdx = I->getOperandNamed(Name);
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if (TIdx >= FIdx)
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if (TIdx >= DestOp)
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throw "Illegal tied-to operand constraint '" + CStr + "'";
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return std::make_pair(FIdx, (TIdx << 16) |
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(1 << (unsigned)TargetInstrInfo::TIED_TO));
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// Build the string.
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return "((" + utostr(TIdx) + " << 16) | TargetInstrInfo::TIED_TO)";
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}
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static std::vector<unsigned> parseConstraints(const std::string &CStr,
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CodeGenInstruction *I) {
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unsigned NumOps = I->OperandList.size();
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std::vector<unsigned> Res(NumOps, 0);
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if (CStr == "")
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return Res;
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static void ParseConstraints(const std::string &CStr, CodeGenInstruction *I) {
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if (CStr.empty()) return;
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const std::string delims(",");
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std::string::size_type bidx, eidx;
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@ -314,13 +311,16 @@ static std::vector<unsigned> parseConstraints(const std::string &CStr,
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eidx = CStr.find_first_of(delims, bidx);
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if (eidx == std::string::npos)
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eidx = CStr.length();
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std::pair<unsigned, unsigned> C =
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parseConstraint(CStr.substr(bidx, eidx), I);
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Res[C.first] = C.second;
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unsigned OpNo;
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std::string Constr = ParseConstraint(CStr.substr(bidx, eidx), I, OpNo);
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assert(OpNo < I->OperandList.size() && "Invalid operand no?");
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if (!I->OperandList[OpNo].Constraint.empty())
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throw "Operand #" + utostr(OpNo) + " cannot have multiple constraints!";
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I->OperandList[OpNo].Constraint = Constr;
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bidx = CStr.find_first_not_of(delims, eidx);
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}
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return Res;
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}
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CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
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@ -403,8 +403,17 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
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MIOperandNo += NumOps;
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}
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ConstraintStr = R->getValueAsString("Constraints");
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ConstraintsList = parseConstraints(ConstraintStr, this);
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ParseConstraints(R->getValueAsString("Constraints"), this);
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// For backward compatibility: isTwoAddress means operand 1 is tied to
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// operand 0.
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if (isTwoAddress && OperandList[1].Constraint.empty())
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OperandList[1].Constraint = "((0 << 16) | TargetInstrInfo::TIED_TO)";
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// Any operands with unset constraints get 0 as their constraint.
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for (unsigned op = 0, e = OperandList.size(); op != e; ++op)
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if (OperandList[op].Constraint.empty())
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OperandList[op].Constraint = "0";
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}
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@ -63,35 +63,52 @@ void InstrInfoEmitter::printDefList(const std::vector<Record*> &Uses,
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OS << "0 };\n";
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}
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static std::vector<std::pair<Record*, unsigned> >
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GetOperandInfo(const CodeGenInstruction &Inst) {
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std::vector<std::pair<Record*, unsigned> > Result;
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std::vector<std::string>
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InstrInfoEmitter::GetOperandInfo(const CodeGenInstruction &Inst) {
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std::vector<std::string> Result;
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for (unsigned i = 0, e = Inst.OperandList.size(); i != e; ++i) {
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if (Inst.OperandList[i].Rec->isSubClassOf("RegisterClass")) {
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Result.push_back(std::make_pair(Inst.OperandList[i].Rec,
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Inst.ConstraintsList[i]));
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std::string OpStr = getQualifiedName(Inst.OperandList[i].Rec);
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OpStr += "RegClassID, 0, ";
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OpStr += Inst.OperandList[i].Constraint;
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Result.push_back(OpStr);
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} else {
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// This might be a multiple operand thing.
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// Targets like X86 have registers in their multi-operand operands.
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// This might be a multiple operand thing. Targets like X86 have
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// registers in their multi-operand operands. It may also be an anonymous
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// operand, which has a single operand, but no declared class for the
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// operand.
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DagInit *MIOI = Inst.OperandList[i].MIOperandInfo;
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unsigned NumDefs = MIOI->getNumArgs();
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for (unsigned j = 0, e = Inst.OperandList[i].MINumOperands; j != e; ++j) {
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if (NumDefs <= j) {
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Result.push_back(std::make_pair((Record*)0, Inst.ConstraintsList[i]));
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} else {
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DefInit *Def = dynamic_cast<DefInit*>(MIOI->getArg(j));
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Result.push_back(std::make_pair(Def ? Def->getDef() : 0,
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Inst.ConstraintsList[i]));
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}
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Record *OpR = 0;
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if (MIOI && j < MIOI->getNumArgs())
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if (DefInit *Def = dynamic_cast<DefInit*>(MIOI->getArg(j)))
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OpR = Def->getDef();
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std::string Res;
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if (OpR && OpR->isSubClassOf("RegisterClass"))
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Res += getQualifiedName(OpR) + "RegClassID, ";
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else
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Res += "0, ";
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// Fill in applicable flags.
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Res += "0";
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// Ptr value whose register class is resolved via callback.
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if (OpR && OpR->getName() == "ptr_rc")
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Res += "|M_LOOK_UP_PTR_REG_CLASS";
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// fill in constraint info.
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Res += ", " + Inst.OperandList[i].Constraint;
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Result.push_back(Res);
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}
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}
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}
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// For backward compatibility: isTwoAddress means operand 1 is tied to
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// operand 0.
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if (Inst.isTwoAddress)
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Result[1].second |= (0 << 16) | (1 << (unsigned)TargetInstrInfo::TIED_TO);
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return Result;
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}
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@ -127,34 +144,21 @@ void InstrInfoEmitter::run(std::ostream &OS) {
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}
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}
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std::map<std::vector<std::pair<Record*, unsigned> >, unsigned>
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OperandInfosEmitted;
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std::map<std::vector<std::string>, unsigned> OperandInfosEmitted;
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unsigned OperandListNum = 0;
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OperandInfosEmitted[std::vector<std::pair<Record*, unsigned> >()] =
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++OperandListNum;
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OperandInfosEmitted[std::vector<std::string>()] = ++OperandListNum;
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// Emit all of the operand info records.
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OS << "\n";
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for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
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E = Target.inst_end(); II != E; ++II) {
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std::vector<std::pair<Record*, unsigned> > OperandInfo =
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GetOperandInfo(II->second);
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std::vector<std::string> OperandInfo = GetOperandInfo(II->second);
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unsigned &N = OperandInfosEmitted[OperandInfo];
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if (N == 0) {
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N = ++OperandListNum;
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OS << "static const TargetOperandInfo OperandInfo" << N << "[] = { ";
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for (unsigned i = 0, e = OperandInfo.size(); i != e; ++i) {
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Record *RC = OperandInfo[i].first;
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// FIXME: We only care about register operands for now.
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if (RC && RC->isSubClassOf("RegisterClass"))
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OS << "{ " << getQualifiedName(RC) << "RegClassID, 0, ";
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else if (RC && RC->getName() == "ptr_rc")
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// Ptr value whose register class is resolved via callback.
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OS << "{ 0, 1, ";
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else
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OS << "{ 0, 0, ";
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OS << OperandInfo[i].second << " }, ";
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}
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for (unsigned i = 0, e = OperandInfo.size(); i != e; ++i)
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OS << "{ " << OperandInfo[i] << " }, ";
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OS << "};\n";
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}
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}
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@ -176,7 +180,7 @@ void InstrInfoEmitter::run(std::ostream &OS) {
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void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
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Record *InstrInfo,
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std::map<std::vector<Record*>, unsigned> &EmittedLists,
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std::map<std::vector<std::pair<Record*,unsigned> >, unsigned> &OpInfo,
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std::map<std::vector<std::string>, unsigned> &OpInfo,
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std::ostream &OS) {
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int MinOperands;
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if (!Inst.OperandList.empty())
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@ -262,7 +266,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
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OS << "ImplicitList" << EmittedLists[DefList] << ", ";
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// Emit the operand info.
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std::vector<std::pair<Record*,unsigned> > OperandInfo = GetOperandInfo(Inst);
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std::vector<std::string> OperandInfo = GetOperandInfo(Inst);
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if (OperandInfo.empty())
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OS << "0";
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else
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void emitRecord(const CodeGenInstruction &Inst, unsigned Num,
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Record *InstrInfo,
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std::map<std::vector<Record*>, unsigned> &EL,
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std::map<std::vector<std::pair<Record*,unsigned> >, unsigned> &OpInfo,
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std::map<std::vector<std::string>, unsigned> &OpInfo,
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std::ostream &OS);
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void GatherItinClasses();
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unsigned ItinClassNumber(std::string ItinName);
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void emitShiftedValue(Record *R, StringInit *Val, IntInit *Shift,
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std::ostream &OS);
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std::vector<std::string> GetOperandInfo(const CodeGenInstruction &Inst);
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};
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} // End llvm namespace
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