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[mips] Invert the abicalls feature bit to be noabicalls so that it's possible for -mno-abicalls to take effect.

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Also added the testcase that should have been in r215194.

This behaviour has surprised me a few times now. The problem is that the
generated MipsSubtarget::ParseSubtargetFeatures() contains code like this:

   if ((Bits & Mips::FeatureABICalls) != 0) IsABICalls = true;

so '-abicalls' means 'leave it at the default' and '+abicalls' means 'set it to
true'. In this case, (and the similar -modd-spreg case) I'd like the code to be

  IsABICalls = (Bits & Mips::FeatureABICalls) != 0;

or possibly:

   if ((Bits & Mips::FeatureABICalls) != 0)
     IsABICalls = true;
   else
     IsABICalls = false;

and preferably arrange for 'Bits & Mips::FeatureABICalls' to be true by default
(on some triples).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215211 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders 2014-08-08 15:47:17 +00:00
parent b79931d94e
commit a19fc6deb8
4 changed files with 14 additions and 19 deletions
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4
lib/Target/Mips/Mips.td
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@ -57,8 +57,8 @@ def MipsInstrInfo : InstrInfo;
// Mips Subtarget features // // Mips Subtarget features //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
def FeatureABICalls : SubtargetFeature<"abicalls", "IsABICalls", "true", def FeatureNoABICalls : SubtargetFeature<"noabicalls", "NoABICalls", "true",
"SVR4-style position-independent code.">; "Disable SVR4-style position-independent code.">;
def FeatureGP64Bit : SubtargetFeature<"gp64", "IsGP64bit", "true", def FeatureGP64Bit : SubtargetFeature<"gp64", "IsGP64bit", "true",
"General Purpose Registers are 64-bit wide.">; "General Purpose Registers are 64-bit wide.">;
def FeatureFP64Bit : SubtargetFeature<"fp64", "IsFP64bit", "true", def FeatureFP64Bit : SubtargetFeature<"fp64", "IsFP64bit", "true",

2
lib/Target/Mips/MipsSubtarget.cpp
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@ -107,7 +107,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
MipsTargetMachine *_TM) MipsTargetMachine *_TM)
: MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(Mips32), : MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(Mips32),
MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false), MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false),
IsFPXX(false), IsABICalls(true), IsFP64bit(false), UseOddSPReg(true), IsFPXX(false), NoABICalls(false), IsFP64bit(false), UseOddSPReg(true),
IsNaN2008bit(false), IsGP64bit(false), HasVFPU(false), HasCnMips(false), IsNaN2008bit(false), IsGP64bit(false), HasVFPU(false), HasCnMips(false),
IsLinux(true), HasMips3_32(false), HasMips3_32r2(false), IsLinux(true), HasMips3_32(false), HasMips3_32r2(false),
HasMips4_32(false), HasMips4_32r2(false), HasMips5_32r2(false), HasMips4_32(false), HasMips4_32r2(false), HasMips5_32r2(false),

6
lib/Target/Mips/MipsSubtarget.h
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@ -65,8 +65,8 @@ protected:
// IsFPXX - MIPS O32 modeless ABI. // IsFPXX - MIPS O32 modeless ABI.
bool IsFPXX; bool IsFPXX;
// IsABICalls - SVR4-style position-independent code. // NoABICalls - Disable SVR4-style position-independent code.
bool IsABICalls; bool NoABICalls;
// IsFP64bit - The target processor has 64-bit floating point registers. // IsFP64bit - The target processor has 64-bit floating point registers.
bool IsFP64bit; bool IsFP64bit;
@ -203,7 +203,7 @@ public:
bool hasCnMips() const { return HasCnMips; } bool hasCnMips() const { return HasCnMips; }
bool isLittle() const { return IsLittle; } bool isLittle() const { return IsLittle; }
bool isABICalls() const { return IsABICalls; } bool isABICalls() const { return !NoABICalls; }
bool isFPXX() const { return IsFPXX; } bool isFPXX() const { return IsFPXX; }
bool isFP64bit() const { return IsFP64bit; } bool isFP64bit() const { return IsFP64bit; }
bool useOddSPReg() const { return UseOddSPReg; } bool useOddSPReg() const { return UseOddSPReg; }

21
test/CodeGen/Mips/abicalls.ll
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@ -1,16 +1,11 @@
; ; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=static %s -o - | FileCheck -check-prefix=ABICALLS -check-prefix=STATIC %s
; When the assembler is ready a .s file for it will ; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 %s -o - | FileCheck -check-prefix=ABICALLS -check-prefix=PIC %s
; be created. ; RUN: llc -filetype=asm -mtriple mips64el-unknown-linux -mcpu=mips4 -relocation-model=static %s -o - | FileCheck -check-prefix=ABICALLS -check-prefix=PIC %s
; RUN: llc -filetype=asm -mtriple mips64el-unknown-linux -mcpu=mips64 -relocation-model=static %s -o - | FileCheck -check-prefix=ABICALLS -check-prefix=PIC %s
; Note that EF_MIPS_CPIC is set by -mabicalls which is the default on Linux ; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 -mattr noabicalls -relocation-model=static %s -o - | FileCheck -implicit-check-not='.abicalls' -implicit-check-not='pic0' %s
; TODO need to support -mno-abicalls
; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-STATIC %s ; ABICALLS: .abicalls
; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 %s -o - | FileCheck -check-prefix=CHECK-PIC %s
; RUN: llc -filetype=asm -mtriple mips64el-unknown-linux -mcpu=mips4 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-PIC %s
; RUN: llc -filetype=asm -mtriple mips64el-unknown-linux -mcpu=mips64 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-PIC %s
; CHECK-STATIC: .abicalls ; STATIC: pic0
; CHECK-STATIC-NEXT: pic0 ; PIC-NOT: pic0
; CHECK-PIC: .abicalls
; CHECK-PIC-NOT: pic0