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Reordered registers slightly to simplify a new check.

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Added a function to map between the caller's and callee's register windows.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@941 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vikram S. Adve 2001-10-22 13:43:08 +00:00
parent 53fec86ffd
commit a1ca7b9d79
1 changed files with 14 additions and 3 deletions
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17
lib/Target/SparcV9/SparcV9RegClassInfo.h
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@ -23,8 +23,9 @@ static string const IntRegNames[] =
"o0", "o1", "o2", "o3", "o4", "o5", "o7", "o0", "o1", "o2", "o3", "o4", "o5", "o7",
"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
"i0", "i1", "i2", "i3", "i4", "i5", "i0", "i1", "i2", "i3", "i4", "i5",
"i6", "i7",
"g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
"i6", "i7", "o6" }; "o6" };
@ -56,8 +57,8 @@ class SparcIntRegOrder{
// --- following colors are not available for allocation within this phase // --- following colors are not available for allocation within this phase
// --- but can appear for pre-colored ranges // --- but can appear for pre-colored ranges
g0, g1, g2, g3, g4, g5, g6, g7, i6, i7, o6 i6, i7, g0, g1, g2, g3, g4, g5, g6, g7, o6
//*** NOTE: If we decide to use globals, some of them are volatile //*** NOTE: If we decide to use globals, some of them are volatile
//**** see sparc64ABI (change isRegVloatile method below) //**** see sparc64ABI (change isRegVloatile method below)
@ -77,6 +78,16 @@ class SparcIntRegOrder{
return IntRegNames[reg]; return IntRegNames[reg];
} }
static unsigned int getRegNumInCallersWindow(const unsigned reg) {
if (reg <= l7 || reg == o6) {
assert(0 && "registers o0-o7 and l0-l7 are not visible in caller");
return reg;
}
if (reg <= i7)
return reg - (i0 - o0);
assert((reg >= g0 || reg <= g7) && "Unrecognized integer register number");
return reg;
}
}; };