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InstCombine now optimizes vector udiv by power of 2 to shifts
Fixes r8429 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144036 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -442,18 +442,22 @@ Instruction *InstCombiner::visitUDiv(BinaryOperator &I) {
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if (Instruction *Common = commonIDivTransforms(I))
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return Common;
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if (ConstantInt *C = dyn_cast<ConstantInt>(Op1)) {
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{
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// X udiv 2^C -> X >> C
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// Check to see if this is an unsigned division with an exact power of 2,
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// if so, convert to a right shift.
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if (C->getValue().isPowerOf2()) { // 0 not included in isPowerOf2
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const APInt *C;
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if (match(Op1, m_Power2(C))) {
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BinaryOperator *LShr =
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BinaryOperator::CreateLShr(Op0,
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ConstantInt::get(Op0->getType(), C->getValue().logBase2()));
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BinaryOperator::CreateLShr(Op0,
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ConstantInt::get(Op0->getType(),
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C->logBase2()));
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if (I.isExact()) LShr->setIsExact();
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return LShr;
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}
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}
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if (ConstantInt *C = dyn_cast<ConstantInt>(Op1)) {
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// X udiv C, where C >= signbit
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if (C->getValue().isNegative()) {
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Value *IC = Builder->CreateICmpULT(Op0, C);
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15
test/CodeGen/X86/vec_udiv_to_shift.ll
Normal file
15
test/CodeGen/X86/vec_udiv_to_shift.ll
Normal file
@ -0,0 +1,15 @@
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define <8 x i16> @udiv_vec8x16(<8 x i16> %var) {
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entry:
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; CHECK: lshr <8 x i16> %var, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
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%0 = udiv <8 x i16> %var, <i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32>
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ret <8 x i16> %0
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}
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define <4 x i32> @udiv_vec4x32(<4 x i32> %var) {
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entry:
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; CHECK: lshr <4 x i32> %var, <i32 4, i32 4, i32 4, i32 4>
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%0 = udiv <4 x i32> %var, <i32 16, i32 16, i32 16, i32 16>
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ret <4 x i32> %0
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}
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