From a2fcff4d97c8fecd58cd977c45f1a883bc6ae1c3 Mon Sep 17 00:00:00 2001
From: Dan Gohman <gohman@apple.com>
Date: Sat, 8 Mar 2008 00:19:12 +0000
Subject: [PATCH] Add support for calls with i128 return values on ppc64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48041 91177308-0d34-0410-b5e6-96231b3b80d8
---
lib/Target/PowerPC/PPCISelLowering.cpp | 16 ++++++++---
test/CodeGen/PowerPC/return-val-i128.ll | 36 +++++++++++++++++++++++++
2 files changed, 49 insertions(+), 3 deletions(-)
create mode 100644 test/CodeGen/PowerPC/return-val-i128.ll
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 7773fc9ee50..06098de0635 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -2015,9 +2015,19 @@ SDOperand PPCTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG,
NodeTys.push_back(MVT::i32);
break;
case MVT::i64:
- Chain = DAG.getCopyFromReg(Chain, PPC::X3, MVT::i64, InFlag).getValue(1);
- ResultVals[0] = Chain.getValue(0);
- NumResults = 1;
+ if (Op.Val->getValueType(1) == MVT::i64) {
+ Chain = DAG.getCopyFromReg(Chain, PPC::X3, MVT::i64, InFlag).getValue(1);
+ ResultVals[0] = Chain.getValue(0);
+ Chain = DAG.getCopyFromReg(Chain, PPC::X4, MVT::i64,
+ Chain.getValue(2)).getValue(1);
+ ResultVals[1] = Chain.getValue(0);
+ NumResults = 2;
+ NodeTys.push_back(MVT::i64);
+ } else {
+ Chain = DAG.getCopyFromReg(Chain, PPC::X3, MVT::i64, InFlag).getValue(1);
+ ResultVals[0] = Chain.getValue(0);
+ NumResults = 1;
+ }
NodeTys.push_back(MVT::i64);
break;
case MVT::f64:
diff --git a/test/CodeGen/PowerPC/return-val-i128.ll b/test/CodeGen/PowerPC/return-val-i128.ll
new file mode 100644
index 00000000000..6e68ee3c520
--- /dev/null
+++ b/test/CodeGen/PowerPC/return-val-i128.ll
@@ -0,0 +1,36 @@
+; RUN: llvm-as < %s | llc -march=ppc64
+
+define i128 @__fixsfdi(float %a) {
+entry:
+ %a_addr = alloca float ; <float*> [#uses=4]
+ %retval = alloca i128, align 16 ; <i128*> [#uses=2]
+ %tmp = alloca i128, align 16 ; <i128*> [#uses=3]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float %a, float* %a_addr
+ %tmp1 = load float* %a_addr, align 4 ; <float> [#uses=1]
+ %tmp2 = fcmp olt float %tmp1, 0.000000e+00 ; <i1> [#uses=1]
+ %tmp23 = zext i1 %tmp2 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp23, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %bb, label %bb8
+bb: ; preds = %entry
+ %tmp4 = load float* %a_addr, align 4 ; <float> [#uses=1]
+ %tmp5 = sub float -0.000000e+00, %tmp4 ; <float> [#uses=1]
+ %tmp6 = call i128 @__fixunssfDI( float %tmp5 ) nounwind ; <i128> [#uses=1]
+ %tmp7 = sub i128 0, %tmp6 ; <i128> [#uses=1]
+ store i128 %tmp7, i128* %tmp, align 16
+ br label %bb11
+bb8: ; preds = %entry
+ %tmp9 = load float* %a_addr, align 4 ; <float> [#uses=1]
+ %tmp10 = call i128 @__fixunssfDI( float %tmp9 ) nounwind ; <i128> [#uses=1]
+ store i128 %tmp10, i128* %tmp, align 16
+ br label %bb11
+bb11: ; preds = %bb8, %bb
+ %tmp12 = load i128* %tmp, align 16 ; <i128> [#uses=1]
+ store i128 %tmp12, i128* %retval, align 16
+ br label %return
+return: ; preds = %bb11
+ %retval13 = load i128* %retval ; <i128> [#uses=1]
+ ret i128 %retval13
+}
+
+declare i128 @__fixunssfDI(float)