From a363a9b71afcf326d376445f6f3cae0c36e6e9d9 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Sun, 28 Feb 2010 00:08:44 +0000 Subject: [PATCH] Don't unconditionally suppress hoisting of instructions with implicit defs or uses. The regular def and use checking below covers them, and can be more precise. It's safe to hoist an instruction with a dead implicit def if the register isn't live into the loop header. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97352 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineLICM.cpp | 30 ++++-------------------------- 1 file changed, 4 insertions(+), 26 deletions(-) diff --git a/lib/CodeGen/MachineLICM.cpp b/lib/CodeGen/MachineLICM.cpp index 92c84f3e836..5580ec13f4f 100644 --- a/lib/CodeGen/MachineLICM.cpp +++ b/lib/CodeGen/MachineLICM.cpp @@ -252,32 +252,6 @@ bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) { return false; } - DEBUG({ - dbgs() << "--- Checking if we can hoist " << I; - if (I.getDesc().getImplicitUses()) { - dbgs() << " * Instruction has implicit uses:\n"; - - const TargetRegisterInfo *TRI = TM->getRegisterInfo(); - for (const unsigned *ImpUses = I.getDesc().getImplicitUses(); - *ImpUses; ++ImpUses) - dbgs() << " -> " << TRI->getName(*ImpUses) << "\n"; - } - - if (I.getDesc().getImplicitDefs()) { - dbgs() << " * Instruction has implicit defines:\n"; - - const TargetRegisterInfo *TRI = TM->getRegisterInfo(); - for (const unsigned *ImpDefs = I.getDesc().getImplicitDefs(); - *ImpDefs; ++ImpDefs) - dbgs() << " -> " << TRI->getName(*ImpDefs) << "\n"; - } - }); - - if (I.getDesc().getImplicitDefs() || I.getDesc().getImplicitUses()) { - DEBUG(dbgs() << "Cannot hoist with implicit defines or uses\n"); - return false; - } - // The instruction is loop invariant if all of its operands are. for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) { const MachineOperand &MO = I.getOperand(i); @@ -311,6 +285,10 @@ bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) { } else if (!MO.isDead()) { // A def that isn't dead. We can't move it. return false; + } else if (CurLoop->getHeader()->isLiveIn(Reg)) { + // If the reg is live into the loop, we can't hoist an instruction + // which would clobber it. + return false; } }