From a3a0db01217efc6403d90eec2a6ceb919f5031bc Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 5 Feb 2010 19:16:26 +0000 Subject: [PATCH] change getSizeOfImm and getBaseOpcodeFor to just take TSFlags directly instead of a TargetInstrDesc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95405 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86CodeEmitter.cpp | 26 +++++++++++++------------- lib/Target/X86/X86ISelLowering.cpp | 8 ++++---- lib/Target/X86/X86InstrInfo.cpp | 28 +++++++++------------------- lib/Target/X86/X86InstrInfo.h | 18 +++++++++++++----- lib/Target/X86/X86MCCodeEmitter.cpp | 14 +++++++------- 5 files changed, 46 insertions(+), 48 deletions(-) diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp index e3a3e67f4c5..9ed6f02661f 100644 --- a/lib/Target/X86/X86CodeEmitter.cpp +++ b/lib/Target/X86/X86CodeEmitter.cpp @@ -566,7 +566,7 @@ void Emitter::emitInstruction(const MachineInstr &MI, // Skip the last source operand that is tied_to the dest reg. e.g. LXADD32 --NumOps; - unsigned char BaseOpcode = X86InstrInfo::getBaseOpcodeFor(*Desc); + unsigned char BaseOpcode = X86InstrInfo::getBaseOpcodeFor(Desc->TSFlags); switch (Desc->TSFlags & X86II::FormMask) { default: llvm_unreachable("Unknown FormMask value in X86 MachineCodeEmitter!"); @@ -596,7 +596,7 @@ void Emitter::emitInstruction(const MachineInstr &MI, case X86::MOVPC32r: { // This emits the "call" portion of this pseudo instruction. MCE.emitByte(BaseOpcode); - emitConstant(0, X86InstrInfo::sizeOfImm(Desc)); + emitConstant(0, X86InstrInfo::getSizeOfImm(Desc->TSFlags)); // Remember PIC base. PICBaseOffset = (intptr_t) MCE.getCurrentPCOffset(); X86JITInfo *JTI = TM.getJITInfo(); @@ -641,9 +641,9 @@ void Emitter::emitInstruction(const MachineInstr &MI, // Fix up immediate operand for pc relative calls. intptr_t Imm = (intptr_t)MO.getImm(); Imm = Imm - MCE.getCurrentPCValue() - 4; - emitConstant(Imm, X86InstrInfo::sizeOfImm(Desc)); + emitConstant(Imm, X86InstrInfo::getSizeOfImm(Desc->TSFlags)); } else - emitConstant(MO.getImm(), X86InstrInfo::sizeOfImm(Desc)); + emitConstant(MO.getImm(), X86InstrInfo::getSizeOfImm(Desc->TSFlags)); break; } @@ -654,7 +654,7 @@ void Emitter::emitInstruction(const MachineInstr &MI, break; const MachineOperand &MO1 = MI.getOperand(CurOp++); - unsigned Size = X86InstrInfo::sizeOfImm(Desc); + unsigned Size = X86InstrInfo::getSizeOfImm(Desc->TSFlags); if (MO1.isImm()) { emitConstant(MO1.getImm(), Size); break; @@ -687,7 +687,7 @@ void Emitter::emitInstruction(const MachineInstr &MI, CurOp += 2; if (CurOp != NumOps) emitConstant(MI.getOperand(CurOp++).getImm(), - X86InstrInfo::sizeOfImm(Desc)); + X86InstrInfo::getSizeOfImm(Desc->TSFlags)); break; } case X86II::MRMDestMem: { @@ -698,7 +698,7 @@ void Emitter::emitInstruction(const MachineInstr &MI, CurOp += X86AddrNumOperands + 1; if (CurOp != NumOps) emitConstant(MI.getOperand(CurOp++).getImm(), - X86InstrInfo::sizeOfImm(Desc)); + X86InstrInfo::getSizeOfImm(Desc->TSFlags)); break; } @@ -709,7 +709,7 @@ void Emitter::emitInstruction(const MachineInstr &MI, CurOp += 2; if (CurOp != NumOps) emitConstant(MI.getOperand(CurOp++).getImm(), - X86InstrInfo::sizeOfImm(Desc)); + X86InstrInfo::getSizeOfImm(Desc->TSFlags)); break; case X86II::MRMSrcMem: { @@ -722,7 +722,7 @@ void Emitter::emitInstruction(const MachineInstr &MI, AddrOperands = X86AddrNumOperands; intptr_t PCAdj = (CurOp + AddrOperands + 1 != NumOps) ? - X86InstrInfo::sizeOfImm(Desc) : 0; + X86InstrInfo::getSizeOfImm(Desc->TSFlags) : 0; MCE.emitByte(BaseOpcode); emitMemModRMByte(MI, CurOp+1, getX86RegNum(MI.getOperand(CurOp).getReg()), @@ -730,7 +730,7 @@ void Emitter::emitInstruction(const MachineInstr &MI, CurOp += AddrOperands + 1; if (CurOp != NumOps) emitConstant(MI.getOperand(CurOp++).getImm(), - X86InstrInfo::sizeOfImm(Desc)); + X86InstrInfo::getSizeOfImm(Desc->TSFlags)); break; } @@ -765,7 +765,7 @@ void Emitter::emitInstruction(const MachineInstr &MI, break; const MachineOperand &MO1 = MI.getOperand(CurOp++); - unsigned Size = X86InstrInfo::sizeOfImm(Desc); + unsigned Size = X86InstrInfo::getSizeOfImm(Desc->TSFlags); if (MO1.isImm()) { emitConstant(MO1.getImm(), Size); break; @@ -794,7 +794,7 @@ void Emitter::emitInstruction(const MachineInstr &MI, case X86II::MRM6m: case X86II::MRM7m: { intptr_t PCAdj = (CurOp + X86AddrNumOperands != NumOps) ? (MI.getOperand(CurOp+X86AddrNumOperands).isImm() ? - X86InstrInfo::sizeOfImm(Desc) : 4) : 0; + X86InstrInfo::getSizeOfImm(Desc->TSFlags) : 4) : 0; MCE.emitByte(BaseOpcode); emitMemModRMByte(MI, CurOp, (Desc->TSFlags & X86II::FormMask)-X86II::MRM0m, @@ -805,7 +805,7 @@ void Emitter::emitInstruction(const MachineInstr &MI, break; const MachineOperand &MO = MI.getOperand(CurOp++); - unsigned Size = X86InstrInfo::sizeOfImm(Desc); + unsigned Size = X86InstrInfo::getSizeOfImm(Desc->TSFlags); if (MO.isImm()) { emitConstant(MO.getImm(), Size); break; diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 6b24fec8a43..f641b11336b 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -7033,8 +7033,8 @@ SDValue X86TargetLowering::LowerTRAMPOLINE(SDValue Op, // Large code-model. - const unsigned char JMP64r = TII->getBaseOpcodeFor(X86::JMP64r); - const unsigned char MOV64ri = TII->getBaseOpcodeFor(X86::MOV64ri); + const unsigned char JMP64r = TII->getBaseOpcodeForOpcode(X86::JMP64r); + const unsigned char MOV64ri = TII->getBaseOpcodeForOpcode(X86::MOV64ri); const unsigned char N86R10 = RegInfo->getX86RegNum(X86::R10); const unsigned char N86R11 = RegInfo->getX86RegNum(X86::R11); @@ -7129,7 +7129,7 @@ SDValue X86TargetLowering::LowerTRAMPOLINE(SDValue Op, DAG.getConstant(10, MVT::i32)); Disp = DAG.getNode(ISD::SUB, dl, MVT::i32, FPtr, Addr); - const unsigned char MOV32ri = TII->getBaseOpcodeFor(X86::MOV32ri); + const unsigned char MOV32ri = TII->getBaseOpcodeForOpcode(X86::MOV32ri); const unsigned char N86Reg = RegInfo->getX86RegNum(NestReg); OutChains[0] = DAG.getStore(Root, dl, DAG.getConstant(MOV32ri|N86Reg, MVT::i8), @@ -7139,7 +7139,7 @@ SDValue X86TargetLowering::LowerTRAMPOLINE(SDValue Op, DAG.getConstant(1, MVT::i32)); OutChains[1] = DAG.getStore(Root, dl, Nest, Addr, TrmpAddr, 1, false, 1); - const unsigned char JMP = TII->getBaseOpcodeFor(X86::JMP); + const unsigned char JMP = TII->getBaseOpcodeForOpcode(X86::JMP); Addr = DAG.getNode(ISD::ADD, dl, MVT::i32, Trmp, DAG.getConstant(5, MVT::i32)); OutChains[2] = DAG.getStore(Root, dl, DAG.getConstant(JMP, MVT::i8), Addr, diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 76c48c312f7..087510f8c52 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -3014,16 +3014,6 @@ isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const { RC == &X86::RFP64RegClass || RC == &X86::RFP80RegClass); } -unsigned X86InstrInfo::sizeOfImm(const TargetInstrDesc *Desc) { - switch (Desc->TSFlags & X86II::ImmMask) { - case X86II::Imm8: return 1; - case X86II::Imm16: return 2; - case X86II::Imm32: return 4; - case X86II::Imm64: return 8; - default: llvm_unreachable("Immediate size not set!"); - return 0; - } -} /// isX86_64ExtendedReg - Is the MachineOperand a x86-64 extended register? /// e.g. r8, xmm8, etc. @@ -3400,7 +3390,7 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI, case X86::MOVPC32r: { // This emits the "call" portion of this pseudo instruction. ++FinalSize; - FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc)); + FinalSize += sizeConstant(X86InstrInfo::getSizeOfImm(Desc->TSFlags)); break; } } @@ -3418,7 +3408,7 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI, } else if (MO.isSymbol()) { FinalSize += sizeExternalSymbolAddress(false); } else if (MO.isImm()) { - FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc)); + FinalSize += sizeConstant(X86InstrInfo::getSizeOfImm(Desc->TSFlags)); } else { llvm_unreachable("Unknown RawFrm operand!"); } @@ -3431,7 +3421,7 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI, if (CurOp != NumOps) { const MachineOperand &MO1 = MI.getOperand(CurOp++); - unsigned Size = X86InstrInfo::sizeOfImm(Desc); + unsigned Size = X86InstrInfo::getSizeOfImm(Desc->TSFlags); if (MO1.isImm()) FinalSize += sizeConstant(Size); else { @@ -3456,7 +3446,7 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI, CurOp += 2; if (CurOp != NumOps) { ++CurOp; - FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc)); + FinalSize += sizeConstant(X86InstrInfo::getSizeOfImm(Desc->TSFlags)); } break; } @@ -3466,7 +3456,7 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI, CurOp += X86AddrNumOperands + 1; if (CurOp != NumOps) { ++CurOp; - FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc)); + FinalSize += sizeConstant(X86InstrInfo::getSizeOfImm(Desc->TSFlags)); } break; } @@ -3477,7 +3467,7 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI, CurOp += 2; if (CurOp != NumOps) { ++CurOp; - FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc)); + FinalSize += sizeConstant(X86InstrInfo::getSizeOfImm(Desc->TSFlags)); } break; @@ -3494,7 +3484,7 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI, CurOp += AddrOperands + 1; if (CurOp != NumOps) { ++CurOp; - FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc)); + FinalSize += sizeConstant(X86InstrInfo::getSizeOfImm(Desc->TSFlags)); } break; } @@ -3519,7 +3509,7 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI, if (CurOp != NumOps) { const MachineOperand &MO1 = MI.getOperand(CurOp++); - unsigned Size = X86InstrInfo::sizeOfImm(Desc); + unsigned Size = X86InstrInfo::getSizeOfImm(Desc->TSFlags); if (MO1.isImm()) FinalSize += sizeConstant(Size); else { @@ -3549,7 +3539,7 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI, if (CurOp != NumOps) { const MachineOperand &MO = MI.getOperand(CurOp++); - unsigned Size = X86InstrInfo::sizeOfImm(Desc); + unsigned Size = X86InstrInfo::getSizeOfImm(Desc->TSFlags); if (MO.isImm()) FinalSize += sizeConstant(Size); else { diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index 9dccfbdff57..affb5a0c5d8 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -640,11 +640,11 @@ public: // getBaseOpcodeFor - This function returns the "base" X86 opcode for the // specified machine instruction. // - static unsigned char getBaseOpcodeFor(const TargetInstrDesc &TID) { - return TID.TSFlags >> X86II::OpcodeShift; + static unsigned char getBaseOpcodeFor(unsigned TSFlags) { + return TSFlags >> X86II::OpcodeShift; } - unsigned char getBaseOpcodeFor(unsigned Opcode) const { - return getBaseOpcodeFor(get(Opcode)); + unsigned char getBaseOpcodeForOpcode(unsigned Opcode) const { + return getBaseOpcodeFor(get(Opcode).TSFlags); } static bool isX86_64NonExtLowByteReg(unsigned reg) { @@ -652,7 +652,15 @@ public: reg == X86::SIL || reg == X86::DIL); } - static unsigned sizeOfImm(const TargetInstrDesc *Desc); + static unsigned getSizeOfImm(unsigned TSFlags) { + switch (TSFlags & X86II::ImmMask) { + default: assert(0 && "Unknown immediate size"); + case X86II::Imm8: return 1; + case X86II::Imm16: return 2; + case X86II::Imm32: return 4; + case X86II::Imm64: return 8; + } + } static bool isX86_64ExtendedReg(const MachineOperand &MO); static unsigned determineREX(const MachineInstr &MI); diff --git a/lib/Target/X86/X86MCCodeEmitter.cpp b/lib/Target/X86/X86MCCodeEmitter.cpp index 4b4f8ce234f..740b43b48cd 100644 --- a/lib/Target/X86/X86MCCodeEmitter.cpp +++ b/lib/Target/X86/X86MCCodeEmitter.cpp @@ -366,7 +366,7 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS) const { // FIXME: Can we kill off MRMInitReg?? - unsigned char BaseOpcode = X86InstrInfo::getBaseOpcodeFor(Desc); + unsigned char BaseOpcode = X86InstrInfo::getBaseOpcodeFor(TSFlags); switch (TSFlags & X86II::FormMask) { default: errs() << "FORM: " << (TSFlags & X86II::FormMask) << "\n"; assert(0 && "Unknown FormMask value in X86MCCodeEmitter!"); @@ -387,7 +387,7 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS) const { const MCOperand &MO1 = MI.getOperand(CurOp++); if (MO1.isImm()) { - unsigned Size = X86InstrInfo::sizeOfImm(&Desc); + unsigned Size = X86InstrInfo::getSizeOfImm(TSFlags); EmitConstant(MO1.getImm(), Size, OS); break; } @@ -403,7 +403,7 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS) const { CurOp += 2; if (CurOp != NumOps) EmitConstant(MI.getOperand(CurOp++).getImm(), - X86InstrInfo::sizeOfImm(&Desc), OS); + X86InstrInfo::getSizeOfImm(TSFlags), OS); break; case X86II::MRMDestMem: @@ -414,7 +414,7 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS) const { CurOp += X86AddrNumOperands + 1; if (CurOp != NumOps) EmitConstant(MI.getOperand(CurOp++).getImm(), - X86InstrInfo::sizeOfImm(&Desc), OS); + X86InstrInfo::getSizeOfImm(TSFlags), OS); break; case X86II::MRMSrcReg: @@ -424,7 +424,7 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS) const { CurOp += 2; if (CurOp != NumOps) EmitConstant(MI.getOperand(CurOp++).getImm(), - X86InstrInfo::sizeOfImm(&Desc), OS); + X86InstrInfo::getSizeOfImm(TSFlags), OS); break; case X86II::MRMSrcMem: { @@ -440,14 +440,14 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS) const { // FIXME: What is this actually doing? intptr_t PCAdj = (CurOp + AddrOperands + 1 != NumOps) ? - X86InstrInfo::sizeOfImm(&Desc) : 0; + X86InstrInfo::getSizeOfImm(TSFlags) : 0; EmitMemModRMByte(MI, CurOp+1, GetX86RegNum(MI.getOperand(CurOp)), PCAdj, OS); CurOp += AddrOperands + 1; if (CurOp != NumOps) EmitConstant(MI.getOperand(CurOp++).getImm(), - X86InstrInfo::sizeOfImm(&Desc), OS); + X86InstrInfo::getSizeOfImm(TSFlags), OS); break; }