6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-12 03:32:10 +00:00
Code Issues Projects Releases Wiki Activity

Move Sparc's getDataLayout out of line and add comments.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196990 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2013-12-11 01:07:43 +00:00
parent 0d87d72fa7
commit a3b00b504e
2 changed files with 24 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
lib/Target/Sparc/SparcSubtarget.h
View File

@ -45,15 +45,6 @@ public:
void ParseSubtargetFeatures(StringRef CPU, StringRef FS); void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
bool is64Bit() const { return Is64Bit; } bool is64Bit() const { return Is64Bit; }
std::string getDataLayout() const {
const char *p;
if (is64Bit()) {
p = "E-p:64:64:64-i64:64:64-f64:64:64-f128:128:128-n32:64";
} else {
p = "E-p:32:32:32-i64:64:64-f64:64:64-f128:64:64-n32";
}
return std::string(p);
}
/// The 64-bit ABI uses biased stack and frame pointers, so the stack frame /// The 64-bit ABI uses biased stack and frame pointers, so the stack frame
/// of the current function is the area from [%sp+BIAS] to [%fp+BIAS]. /// of the current function is the area from [%sp+BIAS] to [%fp+BIAS].

25
lib/Target/Sparc/SparcTargetMachine.cpp
View File

@ -23,6 +23,29 @@ extern "C" void LLVMInitializeSparcTarget() {
RegisterTargetMachine<SparcV9TargetMachine> Y(TheSparcV9Target); RegisterTargetMachine<SparcV9TargetMachine> Y(TheSparcV9Target);
} }
static std::string computeDataLayout(const SparcSubtarget &ST) {
// Sparc is big endian.
std::string Ret = "E";
// V9 has 64 bit pointers, others have 32bit pointers.
if (ST.is64Bit())
Ret += "-p:64:64:64";
else
Ret += "-p:32:32:32";
// Alignments for 64 bit integers and doubles.
Ret += "-i64:64:64-f64:64:64";
// On SparcV9 128 floats are aligned to 128 bits, on others only to 64.
// On SparcV9 registers can hold 64 or 32 bits, on others only 32.
if (ST.is64Bit())
Ret += "-f128:128:128-n32:64";
else
Ret += "-f128:64:64-n32";
return Ret;
}
/// SparcTargetMachine ctor - Create an ILP32 architecture model /// SparcTargetMachine ctor - Create an ILP32 architecture model
/// ///
SparcTargetMachine::SparcTargetMachine(const Target &T, StringRef TT, SparcTargetMachine::SparcTargetMachine(const Target &T, StringRef TT,
@ -33,7 +56,7 @@ SparcTargetMachine::SparcTargetMachine(const Target &T, StringRef TT,
bool is64bit) bool is64bit)
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
Subtarget(TT, CPU, FS, is64bit), Subtarget(TT, CPU, FS, is64bit),
DL(Subtarget.getDataLayout()), DL(computeDataLayout(Subtarget)),
InstrInfo(Subtarget), InstrInfo(Subtarget),
TLInfo(*this), TSInfo(*this), TLInfo(*this), TSInfo(*this),
FrameLowering(Subtarget) { FrameLowering(Subtarget) {