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llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll: Tweak not to be affected by x64 Calling Convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236710 91177308-0d34-0410-b5e6-96231b3b80d8
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; Check that llc can overide function attributes target-cpu and target-features
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; Check that llc can overide function attributes target-cpu and target-features
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; using command line options -mcpu and -mattr.
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; using command line options -mcpu and -mattr.
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; CHECK: vpsadbw %ymm{{[0-9]+}}, %ymm{{[0-9]+}}, %ymm{{[0-9]+}}
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; CHECK: vpsadbw (%r{{si|dx}}), %ymm{{[0-9]+}}, %ymm{{[0-9]+}}
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define <4 x i64> @foo1(<4 x i64> %s1, <4 x i64> %s2) #0 {
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define <4 x i64> @foo1(<4 x i64>* %s1, <4 x i64>* %s2) #0 {
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entry:
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entry:
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%0 = bitcast <4 x i64> %s1 to <32 x i8>
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%ps1 = load <4 x i64>, <4 x i64>* %s1
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%1 = bitcast <4 x i64> %s2 to <32 x i8>
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%ps2 = load <4 x i64>, <4 x i64>* %s2
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%0 = bitcast <4 x i64> %ps1 to <32 x i8>
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%1 = bitcast <4 x i64> %ps2 to <32 x i8>
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%2 = tail call <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8> %0, <32 x i8> %1)
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%2 = tail call <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8> %0, <32 x i8> %1)
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ret <4 x i64> %2
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ret <4 x i64> %2
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}
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}
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