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https://github.com/c64scene-ar/llvm-6502.git
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several entries got significantly better, though they still aren't done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44382 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -186,24 +186,19 @@ double bar(double x) {
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}
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_bar:
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sub sp, sp, #16
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str r4, [sp, #+12]
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str r5, [sp, #+8]
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str lr, [sp, #+4]
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mov r4, r0
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mov r5, r1
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ldr r0, LCPI2_0
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bl _foo
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fmsr f0, r0
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fcvtsd d0, f0
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fmdrr d1, r4, r5
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faddd d0, d0, d1
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fmrrd r0, r1, d0
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ldr lr, [sp, #+4]
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ldr r5, [sp, #+8]
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ldr r4, [sp, #+12]
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add sp, sp, #16
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bx lr
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stmfd sp!, {r4, r5, r7, lr}
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add r7, sp, #8
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mov r4, r0
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mov r5, r1
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fldd d0, LCPI1_0
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fmrrd r0, r1, d0
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bl _foo
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fmdrr d0, r4, r5
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fmsr s2, r0
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fsitod d1, s2
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faddd d0, d1, d0
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fmrrd r0, r1, d0
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ldmfd sp!, {r4, r5, r7, pc}
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Ignore the prologue and epilogue stuff for a second. Note
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mov r4, r0
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@ -501,32 +496,15 @@ Should compile to use SMLAL (Signed Multiply Accumulate Long) which multiplies
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two signed 32-bit values to produce a 64-bit value, and accumulates this with
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a 64-bit value.
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We currently get this with v6:
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We currently get this with both v4 and v6:
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_foo:
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mul r12, r1, r0
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smmul r1, r1, r0
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smmul r0, r3, r2
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mul r3, r3, r2
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adds r3, r3, r12
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adc r0, r0, r1
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smull r1, r0, r1, r0
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smull r3, r2, r3, r2
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adds r3, r3, r1
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adc r0, r2, r0
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bx lr
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and this with v4:
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_foo:
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stmfd sp!, {r7, lr}
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mov r7, sp
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mul r12, r1, r0
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smull r0, r1, r1, r0
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smull lr, r0, r3, r2
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mul r3, r3, r2
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adds r3, r3, r12
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adc r0, r0, r1
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ldmfd sp!, {r7, pc}
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This apparently occurs in real code.
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//===---------------------------------------------------------------------===//
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This:
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