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When materializing an i32, SExt vs ZExt doesn't matter when we're trying to fit
in a 16-bit immediate. However, for the shorter non-legal types (i.e., i1, i8, i16) we should not sign-extend. This prevents us from materializing things such as 'true' (i.e., i1 1). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143743 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -551,7 +551,7 @@ unsigned ARMFastISel::ARMMaterializeInt(const Constant *C, EVT VT) {
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// If we can do this in a single instruction without a constant pool entry
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// do so now.
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const ConstantInt *CI = cast<ConstantInt>(C);
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if (Subtarget->hasV6T2Ops() && isUInt<16>(CI->getSExtValue())) {
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if (Subtarget->hasV6T2Ops() && isUInt<16>(CI->getZExtValue())) {
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unsigned Opc = isThumb ? ARM::t2MOVi16 : ARM::MOVi16;
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unsigned ImmReg = createResultReg(TLI.getRegClassFor(VT));
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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