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constant propagate a method away.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95408 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2010-02-05 19:20:30 +00:00
parent 17146baef5
commit a62fe66f99
2 changed files with 5 additions and 11 deletions
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13
lib/Target/X86/X86ISelLowering.cpp
View File

@@ -7025,16 +7025,12 @@ SDValue X86TargetLowering::LowerTRAMPOLINE(SDValue Op,
const Value *TrmpAddr = cast<SrcValueSDNode>(Op.getOperand(4))->getValue(); const Value *TrmpAddr = cast<SrcValueSDNode>(Op.getOperand(4))->getValue();
const X86InstrInfo *TII =
((X86TargetMachine&)getTargetMachine()).getInstrInfo();
if (Subtarget->is64Bit()) { if (Subtarget->is64Bit()) {
SDValue OutChains[6]; SDValue OutChains[6];
// Large code-model. // Large code-model.
const unsigned char JMP64r = 0xFF; // 64-bit jmp through register opcode.
const unsigned char JMP64r = TII->getBaseOpcodeForOpcode(X86::JMP64r); const unsigned char MOV64ri = 0xB8; // X86::MOV64ri opcode.
const unsigned char MOV64ri = TII->getBaseOpcodeForOpcode(X86::MOV64ri);
const unsigned char N86R10 = RegInfo->getX86RegNum(X86::R10); const unsigned char N86R10 = RegInfo->getX86RegNum(X86::R10);
const unsigned char N86R11 = RegInfo->getX86RegNum(X86::R11); const unsigned char N86R11 = RegInfo->getX86RegNum(X86::R11);
@@ -7129,7 +7125,8 @@ SDValue X86TargetLowering::LowerTRAMPOLINE(SDValue Op,
DAG.getConstant(10, MVT::i32)); DAG.getConstant(10, MVT::i32));
Disp = DAG.getNode(ISD::SUB, dl, MVT::i32, FPtr, Addr); Disp = DAG.getNode(ISD::SUB, dl, MVT::i32, FPtr, Addr);
const unsigned char MOV32ri = TII->getBaseOpcodeForOpcode(X86::MOV32ri); // This is storing the opcode for MOV32ri.
const unsigned char MOV32ri = 0xB8; // X86::MOV32ri's opcode byte.
const unsigned char N86Reg = RegInfo->getX86RegNum(NestReg); const unsigned char N86Reg = RegInfo->getX86RegNum(NestReg);
OutChains[0] = DAG.getStore(Root, dl, OutChains[0] = DAG.getStore(Root, dl,
DAG.getConstant(MOV32ri|N86Reg, MVT::i8), DAG.getConstant(MOV32ri|N86Reg, MVT::i8),
@@ -7139,7 +7136,7 @@ SDValue X86TargetLowering::LowerTRAMPOLINE(SDValue Op,
DAG.getConstant(1, MVT::i32)); DAG.getConstant(1, MVT::i32));
OutChains[1] = DAG.getStore(Root, dl, Nest, Addr, TrmpAddr, 1, false, 1); OutChains[1] = DAG.getStore(Root, dl, Nest, Addr, TrmpAddr, 1, false, 1);
const unsigned char JMP = TII->getBaseOpcodeForOpcode(X86::JMP); const unsigned char JMP = 0xE9; // jmp <32bit dst> opcode.
Addr = DAG.getNode(ISD::ADD, dl, MVT::i32, Trmp, Addr = DAG.getNode(ISD::ADD, dl, MVT::i32, Trmp,
DAG.getConstant(5, MVT::i32)); DAG.getConstant(5, MVT::i32));
OutChains[2] = DAG.getStore(Root, dl, DAG.getConstant(JMP, MVT::i8), Addr, OutChains[2] = DAG.getStore(Root, dl, DAG.getConstant(JMP, MVT::i8), Addr,

3
lib/Target/X86/X86InstrInfo.h
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@@ -643,9 +643,6 @@ public:
static unsigned char getBaseOpcodeFor(unsigned TSFlags) { static unsigned char getBaseOpcodeFor(unsigned TSFlags) {
return TSFlags >> X86II::OpcodeShift; return TSFlags >> X86II::OpcodeShift;
} }
unsigned char getBaseOpcodeForOpcode(unsigned Opcode) const {
return getBaseOpcodeFor(get(Opcode).TSFlags);
}
static bool isX86_64NonExtLowByteReg(unsigned reg) { static bool isX86_64NonExtLowByteReg(unsigned reg) {
return (reg == X86::SPL || reg == X86::BPL || return (reg == X86::SPL || reg == X86::BPL ||