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Add a Debug bit to MachineOperand, for uses that

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are from debug info.  Add an iterator to MachineRegisterInfo
to skip Debug operands when walking the use list.  No
functional change yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95473 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dale Johannesen
2010-02-06 02:28:32 +00:00
parent dc91856575
commit a65aa0f0bb
3 changed files with 40 additions and 10 deletions
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14
include/llvm/CodeGen/MachineOperand.h
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@@ -87,6 +87,10 @@ private:
/// model the GCC inline asm '&' constraint modifier.
bool IsEarlyClobber : 1;
/// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
/// not a real instruction. Such uses should be ignored during codegen.
bool IsDebug : 1;
/// ParentMI - This is the instruction that this operand is embedded into.
/// This is valid for all operand types, when the operand is in an instr.
MachineInstr *ParentMI;
@@ -214,6 +218,12 @@ public:
return IsEarlyClobber;
}
bool isDebug() const {
assert(isReg() && "Wrong MachineOperand accessor");
assert(!isDef() && "Wrong MachineOperand accessor");
return IsDebug;
}
/// getNextOperandForReg - Return the next MachineOperand in the function that
/// uses or defines this register.
MachineOperand *getNextOperandForReg() const {
@@ -388,7 +398,8 @@ public:
bool isKill = false, bool isDead = false,
bool isUndef = false,
bool isEarlyClobber = false,
unsigned SubReg = 0) {
unsigned SubReg = 0,
bool isDebug = false) {
MachineOperand Op(MachineOperand::MO_Register);
Op.IsDef = isDef;
Op.IsImp = isImp;
@@ -396,6 +407,7 @@ public:
Op.IsDead = isDead;
Op.IsUndef = isUndef;
Op.IsEarlyClobber = isEarlyClobber;
Op.IsDebug = isDebug;
Op.Contents.Reg.RegNo = Reg;
Op.Contents.Reg.Prev = 0;
Op.Contents.Reg.Next = 0;