6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-11 10:31:40 +00:00
Code Issues Projects Releases Wiki Activity

[X86] Add peephole for masked rotate amount

Browse Source 
Extend what's currently done for shift because the HW performs this masking
implicitly:

   (rotl:i32 x, (and y, 31)) -> (rotl:i32 x, y)

I use the newly factored out multiclass that was only supporting shifts so
far.

For testing I extended my testcase for the new rotation idiom.

<rdar://problem/15295856>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203718 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Adam Nemet 2014-03-12 21:20:55 +00:00
parent 9367c49f5d
commit a65ca9dcf0
2 changed files with 10 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/X86/X86InstrCompiler.td
View File

@ -1556,6 +1556,8 @@ multiclass MaskedShiftAmountPats<SDNode frag, string name> {
defm : MaskedShiftAmountPats<shl, "SHL">;
defm : MaskedShiftAmountPats<srl, "SHR">;
defm : MaskedShiftAmountPats<sra, "SAR">;
defm : MaskedShiftAmountPats<rotl, "ROL">;
defm : MaskedShiftAmountPats<rotr, "ROR">;
// (anyext (setcc_carry)) -> (setcc_carry)
def : Pat<(i16 (anyext (i8 (X86setcc_c X86_COND_B, EFLAGS)))),

8
test/CodeGen/X86/rotate4.ll
View File

@ -5,6 +5,7 @@
define i32 @rotate_left_32(i32 %a, i32 %b) {
; CHECK-LABEL: rotate_left_32:
; CHECK-NOT: and
; CHECK: roll
entry:
%and = and i32 %b, 31
@ -18,6 +19,7 @@ entry:
define i32 @rotate_right_32(i32 %a, i32 %b) {
; CHECK-LABEL: rotate_right_32:
; CHECK-NOT: and
; CHECK: rorl
entry:
%and = and i32 %b, 31
@ -31,6 +33,7 @@ entry:
define i64 @rotate_left_64(i64 %a, i64 %b) {
; CHECK-LABEL: rotate_left_64:
; CHECK-NOT: and
; CHECK: rolq
entry:
%and = and i64 %b, 63
@ -44,6 +47,7 @@ entry:
define i64 @rotate_right_64(i64 %a, i64 %b) {
; CHECK-LABEL: rotate_right_64:
; CHECK-NOT: and
; CHECK: rorq
entry:
%and = and i64 %b, 63
@ -59,6 +63,7 @@ entry:
define void @rotate_left_m32(i32 *%pa, i32 %b) {
; CHECK-LABEL: rotate_left_m32:
; CHECK-NOT: and
; CHECK: roll
; no store:
; CHECK-NOT: mov
@ -76,6 +81,7 @@ entry:
define void @rotate_right_m32(i32 *%pa, i32 %b) {
; CHECK-LABEL: rotate_right_m32:
; CHECK-NOT: and
; CHECK: rorl
; no store:
; CHECK-NOT: mov
@ -93,6 +99,7 @@ entry:
define void @rotate_left_m64(i64 *%pa, i64 %b) {
; CHECK-LABEL: rotate_left_m64:
; CHECK-NOT: and
; CHECK: rolq
; no store:
; CHECK-NOT: mov
@ -110,6 +117,7 @@ entry:
define void @rotate_right_m64(i64 *%pa, i64 %b) {
; CHECK-LABEL: rotate_right_m64:
; CHECK-NOT: and
; CHECK: rorq
; no store:
; CHECK-NOT: mov