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ARM assembly parsing for optional datatype suffix on VFP VMOV GPR<->VFP insns.

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Yet more of rdar://10435076.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144691 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-11-15 20:29:42 +00:00
parent bfb0a1717b
commit a68e90c36e
2 changed files with 21 additions and 0 deletions
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11
lib/Target/ARM/ARMInstrVFP.td
View File

@ -1178,3 +1178,14 @@ def : VFP2InstAlias<"vmul${p}.f64 $Dn, $Dm",
(VMULD DPR:$Dn, DPR:$Dn, DPR:$Dm, pred:$p)>;
def : VFP2InstAlias<"vmul${p}.f32 $Sn, $Sm",
(VMULS SPR:$Sn, SPR:$Sn, SPR:$Sm, pred:$p)>;
// VMOV can accept optional .f32/.f64 suffix.
def : VFP2InstAlias<"vmov${p}.f32 $Rt, $Sn",
(VMOVRS GPR:$Rt, SPR:$Sn, pred:$p)>;
def : VFP2InstAlias<"vmov${p}.f32 $Sn, $Rt",
(VMOVSR SPR:$Sn, GPR:$Rt, pred:$p)>;
def : VFP2InstAlias<"vmov${p}.f64 $Rt, $Rt2, $Dn",
(VMOVRRD GPR:$Rt, GPR:$Rt2, DPR:$Dn, pred:$p)>;
def : VFP2InstAlias<"vmov${p}.f64 $Dn, $Rt, $Rt2",
(VMOVDRR DPR:$Dn, GPR:$Rt, GPR:$Rt2, pred:$p)>;

10
test/MC/ARM/simple-fp-encoding.s
View File

@ -133,6 +133,16 @@
vmovne s0, r0
vmoveq s0, r1
vmov.f32 r1, s2
vmov.f32 s4, r3
vmov.f64 r1, r5, d2
vmov.f64 d4, r3, r9
@ CHECK: vmov r1, s2 @ encoding: [0x10,0x1a,0x11,0xee]
@ CHECK: vmov s4, r3 @ encoding: [0x10,0x3a,0x02,0xee]
@ CHECK: vmov r1, r5, d2 @ encoding: [0x12,0x1b,0x55,0xec]
@ CHECK: vmov d4, r3, r9 @ encoding: [0x14,0x3b,0x49,0xec]
@ CHECK: vmrs r0, fpscr @ encoding: [0x10,0x0a,0xf1,0xee]
vmrs r0, fpscr
@ CHECK: vmrs r0, fpexc @ encoding: [0x10,0x0a,0xf8,0xee]