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[CodeGenPrepare] Fix the check of the legality of an instruction.

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The API expects an ISD opcode, not an IR opcode.
Fixes a regression for R600.

Related to <rdar://problem/15519855>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201923 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Quentin Colombet 2014-02-22 01:06:41 +00:00
parent c94f3ae027
commit a6e734d2ed
2 changed files with 13 additions and 5 deletions
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7
lib/CodeGen/CodeGenPrepare.cpp
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@ -1756,7 +1756,12 @@ AddressingModeMatcher::IsPromotionProfitable(unsigned MatchedSize,
Instruction *PromotedInst = dyn_cast<Instruction>(PromotedOperand); Instruction *PromotedInst = dyn_cast<Instruction>(PromotedOperand);
if (!PromotedInst) if (!PromotedInst)
return false; return false;
return TLI.isOperationLegalOrCustom(PromotedInst->getOpcode(), int ISDOpcode = TLI.InstructionOpcodeToISD(PromotedInst->getOpcode());
// If the ISDOpcode is undefined, it was undefined before the promotion.
if (!ISDOpcode)
return true;
// Otherwise, check if the promoted instruction is legal or not.
return TLI.isOperationLegalOrCustom(ISDOpcode,
EVT::getEVT(PromotedInst->getType())); EVT::getEVT(PromotedInst->getType()));
} }

11
test/CodeGen/R600/codegen-prepare-addrmode-sext.ll
View File

@ -1,11 +1,14 @@
; RUN: opt -codegenprepare -S -o - %s | FileCheck %s ; RUN: opt -codegenprepare -S -o - %s | FileCheck --check-prefix=OPT --check-prefix=FUNC %s
; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-LLC --check-prefix=FUNC %s
target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64" target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
target triple = "r600--" target triple = "r600--"
; CHECK-LABEL: @test ; FUNC-LABEL: @test
; CHECK: mul ; OPT: mul nsw i32
; CHECK-NEXT: sext ; OPT-NEXT: sext
; SI-LLC: V_MUL_LO_I32
; SI-LLC-NOT: V_MUL_HI
define void @test(i8 addrspace(1)* nocapture readonly %in, i32 %a, i8 %b) { define void @test(i8 addrspace(1)* nocapture readonly %in, i32 %a, i8 %b) {
entry: entry:
%0 = mul nsw i32 %a, 3 %0 = mul nsw i32 %a, 3