From a704bc9354d8b03fd98da9bd7de5ae1dc49af961 Mon Sep 17 00:00:00 2001 From: Johnny Chen Date: Fri, 15 Apr 2011 22:49:08 +0000 Subject: [PATCH] A8.6.315 VLD3 (single 3-element structure to all lanes) The a bit must be encoded as 0. rdar://problem/9292625 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129618 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp | 6 ++++++ .../Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt | 11 +++++++++++ 2 files changed, 17 insertions(+) create mode 100644 test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt diff --git a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp index b7a9a8b5250..942a74b9088 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp @@ -2683,6 +2683,12 @@ static bool DisassembleNLdSt(MCInst &MI, unsigned Opcode, uint32_t insn, // Now we can calculate the alignment! if (a) alignment = elem * data_size; + } else { + if (a) { + // A8.6.315 VLD3 (single 3-element structure to all lanes) + // The a bit must be encoded as 0. + return false; + } } } else { // Multiple n-element structures with type encoded as Inst{11-8}. diff --git a/test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt b/test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt new file mode 100644 index 00000000000..5fd02517991 --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt @@ -0,0 +1,11 @@ +# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding} + +# Opcode=871 Name=VLD3DUPd32_UPD Format=ARM_FORMAT_NLdSt(30) +# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +# ------------------------------------------------------------------------------------------------- +# | 1: 1: 1: 1| 0: 1: 0: 0| 1: 0: 1: 0| 0: 0: 1: 0| 0: 0: 1: 0| 1: 1: 1: 0| 1: 0: 0: 1| 0: 0: 1: 0| +# ------------------------------------------------------------------------------------------------- +# +# A8.6.315 VLD3 (single 3-element structure to all lanes) +# The a bit must be encoded as 0. +0xa2 0xf9 0x92 0x2e